Multi-Composition Dielectric for Semiconductor Gate Isolation

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Solution Overview

Problem

The replacement gate methodology in semiconductor device fabrication, which involves chemical mechanical polishing (CMP) and dummy gate removal, often results in unwanted loss of interlayer dielectric material due to exposure and attack during these processes, compromising the integrity and isolation between gate features.

Innovation Solution

A multi-composition or multi-region dielectric layer is formed, comprising a first portion with a standard composition and a second portion with a higher silicon content, allowing for reduced material loss during CMP and dummy gate removal processes while maintaining sufficient isolation between semiconductor device features.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If replacement gate methodology is used with CMP and dummy gate removal, then metal gate electrode performance is improved, but interlayer dielectric material loss increases

Engineering Contradiction:

Improvemetal gate electrode stabilityVSAvoidinterlayer dielectric material loss

Core Design Contradiction:

ReliabilityVSLoss of substance

Solution Approach 1:

A protective dielectric layer is formed over the interlayer dielectric before the CMP and dummy gate removal processes. This preliminary protective layer prevents material loss during subsequent processing steps, and is later removed after serving its protective function.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The protective dielectric layer acts as an intermediary between the interlayer dielectric and the harsh CMP/etching processes. It absorbs the harmful effects of these processes, preventing direct attack on the interlayer dielectric material.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If additional process modules (CMP, dummy gate removal) are added, then metal gate electrode functionality is improved, but processing complexity increases

Engineering Contradiction:

Improvemetal gate electrode functionalityVSAvoidprocessing complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The protective dielectric layer is segmented into distinct functional regions: a first portion that protects during CMP and a second portion that protects during dummy gate removal. This segmentation allows each portion to be optimized for its specific protective function while simplifying the overall process design.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different portions of the protective dielectric layer have different compositions and properties tailored to their specific protective needs. The first portion is optimized for CMP resistance while the second portion is optimized for etch resistance during dummy gate removal.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS8927359B2Multi-composition dielectric for semiconductor device

Publication Date: 2015.01.06 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

The present disclosure provides a method of semiconductor device fabrication including forming a multi-composition ILD layer by forming a first portion of an inter-layer dielectric (ILD) layer on a semiconductor substrate; and forming a second portion of an ILD layer on the first portion of the ILD layer. The second portion may have a greater silicon content than the first portion. For example, the second portion may be a silicon rich oxide.