Multi-core Audio Processor with Low-Latency Sample Processing

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Solution Overview

Problem

Existing digital signal processing technologies face challenges in minimizing latency, particularly in applications like asynchronous sample rate conversion, phase alignment, and ambient noise cancellation, which are sensitive to processing delays.

Innovation Solution

A multi-core audio processor with single sample processing cores and low-latency execution units that implement specific hardware instructions for efficient computation of sine, cosine, and exponential functions, along with fixed-point division, to minimize execution cycles and reduce hardware costs through the use of state registers and hard-wired routes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If general-purpose processing units are used for audio sample processing, then device complexity is reduced and ease of manufacture is improved, but processing latency increases and productivity decreases

Engineering Contradiction:
Improveprocessing latencyVSAvoidprocessor architecture complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The processor is divided into multiple independent sample processing cores, each capable of handling individual audio samples. This segmentation allows parallel processing of multiple samples simultaneously, reducing overall processing latency while maintaining manageable complexity through modular design

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential single-sample processing to parallel multi-core processing by adding the dimension of concurrent execution. Multiple processing cores operate simultaneously on different samples, transforming the processing model from one-dimensional sequential to multi-dimensional parallel execution

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If complex mathematical functions (sine, cosine, exponential) are computed using software routines, then device complexity is minimized, but execution time increases and productivity decreases

Engineering Contradiction:
Improvecomputation speedVSAvoidhardware circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent replaces software-based mathematical computation with dedicated hardware computation units. Sine, cosine, and exponential functions are computed using specialized hardware circuits (such as lookup tables, polynomial approximations, or dedicated function generators) rather than software routines, significantly reducing execution time at the cost of increased hardware complexity

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the computational approach by pre-calculating and storing mathematical function values in lookup tables or using approximate algorithms with controlled precision. This parameter change from exact software computation to approximate hardware computation achieves faster execution while managing hardware resource requirements

Inventive Principle:
Principle #35Parameter changes

3Productivity

If fixed-point division is implemented using floating-point units, then ease of operation is improved, but processing latency increases and productivity decreases

Engineering Contradiction:
Improvedivision operation speedVSAvoidcomputation simplicity
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The patent extracts the division operation from general-purpose floating-point units and implements dedicated fixed-point division hardware. By separating this specific operation into specialized circuitry, the system achieves faster division performance for audio processing applications while avoiding the overhead of floating-point conversion and processing

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11074032B2Multi-core audio processor with low-latency sample processing core
Publication Date: 2021.07.27 SAMSUNG ELECTRONICS CO LTD
  • US11074032B2 patent drawing
  • US11074032B2 patent drawing
  • US11074032B2 patent drawing

AI summary

A multi-core audio processor includes a data protocol interface configured to receive a stream of audio data, a plurality of data processing cores including a single sample processing core and a block data processing core, an audio fabric block configured to route samples of the stream between the data protocol interface and the plurality of data processing cores. The single sample processing core includes an execution unit configured to execute one or more low latency instructions for performing computations for the samples.