Multi-Core Processor Computation Deration Management
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Multi-core processors experience computation derations due to interferences between hosted functions running on different cores, which degrade their computation capacity and data access performance.
Innovation Solution
A method and system to determine the effects of multi-core and single-core contentions on a particular core and hosted function, calculating an adjustment time to the baseline activation time to overcome these effects, and allocating computation time accordingly to ensure reliable operation at a predetermined probability goal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple hosted functions are executed on a multi-core processor to provide parallel computing, then productivity is improved, but computation capacity and data access performance are degraded due to inter-core interferences and contentions
Solution Approach 1:
The system performs preliminary characterization of multi-core and single-core contentions before executing hosted functions. By pre-determining the effects of contentions on computation capacity and data access performance, the system can allocate appropriate computation time and adjust activation times to overcome interference effects, ensuring reliable operation of multiple functions in parallel
Solution Approach 2:
The system adjusts computation time parameters and activation time parameters based on determined contention effects. By dynamically modifying these temporal parameters, the system compensates for performance degradation caused by multi-core contentions while maintaining parallel execution benefits
2Ease of operation
If computation time is allocated without considering multi-core contentions, then ease of operation is improved, but reliability of computation completion is degraded
Solution Approach 1:
The system automatically determines the effects of multi-core and single-core contentions and adjusts computation time requirements without manual intervention. The multi-core processor self-characterizes interference patterns and self-adjusts timing parameters, maintaining ease of operation while ensuring reliable computation completion
Solution Approach 2:
The system uses determined contention effects as feedback to adjust computation time allocation. By continuously accounting for multi-core interference patterns and modifying timing parameters accordingly, the system ensures that hosted functions complete reliably while maintaining simple operational interfaces
Data Source
AI summary
Systems and methods for predicting and managing computation derations that may occur in multi-core processors are disclosed. The method may include: determining effects of multi-core contentions on a particular core of a multi-core processor; determining effects of single-core contentions on a particular hosted function hosted on the multi-core processor; determining an adjustment time to a baseline activation time for the particular hosted function, wherein the adjustment time plus the baseline activation time overcome the effects of multi-core contentions and single-core contentions at a predetermined probability goal; and adjusting a computation time requirement of the particular hosted function to include the adjustment time and the baseline activation time.