Multi-Core Contention Mitigation via Stressful Application Simulation
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Solution Overview
Problem
Multi-master embedded platforms face challenges in achieving deterministic operation due to conflicts from concurrent access to shared resources, which is critical in high-reliability environments like avionics, where existing solutions either conceal issues or have physical limitations, making them unsuitable for high-criticality contexts.
Innovation Solution
A method for mitigating contentions in multi-core platforms by determining and executing stressful applications that simulate worst-case scenarios, allowing for predictable operation without oversizing components, using arbitration levels and software to manage access channels and interference channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-master architecture is used to enable parallel execution, then productivity is improved, but reliability deteriorates due to uncontrolled contention and non-deterministic operation
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing worst-case execution times for all possible contention scenarios before runtime. The arbitration mechanism uses these pre-computed values to make deterministic scheduling decisions, eliminating the need for runtime analysis and ensuring predictable behavior in multi-master environments.
Solution Approach 2:
The patent introduces an arbitration level as an intermediary between cores and shared resources. This mediator implements a deterministic arbitration policy that fairly allocates access to shared resources, preventing contention-induced non-determinism while maintaining parallel execution capabilities.
2Productivity
If acceleration mechanisms are added to increase core performance, then productivity is improved, but device complexity increases and physical limits are reached
Solution Approach 1:
The patent implements self-service by enabling each core to independently calculate its worst-case execution time for shared resource access using a formal model. This self-computed information is then used by the arbitration mechanism, eliminating the need for complex centralized analysis tools or external verification infrastructure.
Solution Approach 2:
The patent changes the parameter representation by using worst-case execution time values as explicit parameters in the arbitration decision-making process. This transformation of performance characteristics into discrete, comparable parameters simplifies the arbitration logic and reduces overall system complexity.
3Reliability
If contention mitigation is implemented to ensure deterministic operation, then reliability is improved, but loss of time occurs due to arbitration overhead
Solution Approach 1:
The patent applies preliminary action by pre-calculating worst-case execution times during system configuration or initialization. These pre-computed values are stored and reused during runtime arbitration, eliminating the need for time-consuming runtime analysis and minimizing arbitration overhead.
4Productivity
If shared resources are used to enable multi-core execution, then productivity is improved, but harmful factors increase due to conflicts and uncontrolled access times
Solution Approach 1:
The patent introduces an arbitration level as an intermediary between cores and shared resources. This mediator implements a deterministic arbitration policy that fairly allocates access to shared resources, preventing contention-induced non-determinism while maintaining parallel execution capabilities.
Solution Approach 2:
The patent implements feedback by using worst-case execution time measurements from actual system operation to validate and refine the formal model. This feedback loop ensures that the contention mitigation mechanism adapts to real-world performance characteristics while maintaining deterministic guarantees.
Data Source
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AI summary
The present invention relates to a contention mitigation method (200) for an operational application implemented by an embedded platform comprising a plurality of cores and a plurality of shared resources. This method consists of the steps of executing (210) the operational application by one of the cores of the embedded platform, executing (220) a stressful application on at least some other cores of the embedded platform in parallel with the operational application, the stressful application being composed of a set of contention tasks generating maximum contention on interference channels, and determining (230) the contentions generated by the stressful application on the operational application.