Multi-core Processor Frequency Limit via Weighted Core Activity

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Solution Overview

Problem

Legacy multi-core processor frequency limit determination is constrained by the number of active cores based solely on their power states, leading to inefficient operation and excessive frequency toggling due to low activity levels of cores in C0 or C1 states, which negatively impact overall processor performance and power consumption.

Innovation Solution

The proposed solution involves calculating a frequency limit for a multi-core processor by assigning weights to each core based on additional factors such as frequency, power consumption, and temperature, rather than just their power states, to determine the overall activity level and adjust the frequency limit accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the frequency limit is determined solely based on the number of active cores in C0 or C1 states, then the implementation is simple, but the processor operates at lower frequencies and experiences excessive frequency toggling

Engineering Contradiction:
Improvefrequency limit determination complexityVSAvoidprocessor operating frequency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent changes the parameters used to determine core activity from simple power state (C0/C1) to a weighted metric that incorporates multiple factors including power consumption, temperature, and frequency. This allows for a more accurate assessment of actual core activity, enabling the frequency limit to be set higher when cores are truly idle even if they are in C0/C1 states, thereby resolving the contradiction between simple implementation and high operating frequency.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If cores in C0 or C1 states are considered active, then the frequency limit is conservatively lowered, but this causes unnecessary power consumption and performance reduction

Engineering Contradiction:
Improvefrequency limit safetyVSAvoidprocessor power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements a feedback mechanism that continuously monitors multiple parameters (power consumption, temperature, frequency) of each core and adjusts the frequency limit dynamically based on the weighted activity metric. This feedback loop ensures that the frequency limit is lowered only when cores are genuinely active, avoiding unnecessary power consumption and performance reduction while maintaining reliable operation.

Inventive Principle:
Principle #23Feedback

3Reliability

If the frequency limit is lowered to account for potential core activity, then processor safety is maintained, but overall performance and efficiency are reduced

Engineering Contradiction:
Improveprocessor operation safetyVSAvoidprocessor performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent changes from using a single conservative parameter (power state) to a multi-parameter weighted metric that accurately reflects actual core activity. This allows the system to maintain safety by only lowering the frequency limit when truly necessary, while maximizing performance by operating at higher frequencies when cores are actually idle, thus resolving the contradiction between safety and performance.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240231465A9Multi-core processor frequency limit determination
Publication Date: 2024.07.11 INTEL CORP
  • US20240231465A9 patent drawing
  • US20240231465A9 patent drawing
  • US20240231465A9 patent drawing

AI summary

Embodiments herein relate to a technique to be performed by a power control unit (PCU) of an electronic device. Specifically, the PCU may identify, based on a metric related to an activity level of a processor core of a multi-core processor of the electronic device, first, second, and third weights that are respectively related to first, second, and third cores of the multi-core processor. Based on these weights, the PCU may identify a number of active processor cores of the multi-core processor, and alter a frequency limit of the multi-core processor accordingly. Other embodiments may be described and claimed.