Multi-Core Processor Frequency Scaling via OS Thermal Feedback

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Solution Overview

Problem

In multiple core processor environments, available processing bandwidth is often wasted due to thermal and power constraints, limiting processor cores to operate below their maximum capabilities, such as dual cores being restricted to 2.7 GHz instead of 3 GHz due to thermal and power budgets.

Innovation Solution

An operating system monitors the utilization of each processor core and dynamically adjusts their performance and power states, allowing one core to operate at a lower performance level while the other operates at a higher level, or places underutilized cores in a minimum power state to maintain system efficiency within thermal and power limits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If both processor cores operate at maximum frequency (3 GHz), then processing capability is improved, but thermal and power constraints are exceeded

Engineering Contradiction:
Improveprocessing capabilityVSAvoidthermal budget
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The system dynamically adjusts the operating frequency of processor cores based on real-time monitoring of utilization metrics and thermal conditions. The frequency can vary between minimum and maximum thresholds, allowing the system to optimize performance while staying within thermal budgets. This is achieved through continuous feedback loops that modify operational parameters on-the-fly.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the operational parameters (frequency, voltage) of processor cores based on monitored conditions. When thermal constraints are detected, the system reduces frequency below the maximum capability; when thermal headroom is available, it increases frequency above the conservative default, thereby optimizing the trade-off between processing capability and thermal output.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If both processor cores operate at maximum frequency (3 GHz), then processing capability is improved, but power consumption increases beyond system budget

Engineering Contradiction:
Improveprocessing capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts the operating frequency of processor cores based on real-time monitoring of utilization metrics and thermal conditions. The frequency can vary between minimum and maximum thresholds, allowing the system to optimize performance while staying within thermal budgets. This is achieved through continuous feedback loops that modify operational parameters on-the-fly.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the operational parameters (frequency, voltage) of processor cores based on monitored conditions. When thermal constraints are detected, the system reduces frequency below the maximum capability; when thermal headroom is available, it increases frequency above the conservative default, thereby optimizing the trade-off between processing capability and thermal output.

Inventive Principle:
Principle #35Parameter changes

3Temperature

If processor cores are limited to lower frequency (2.7 GHz) due to thermal constraints, then thermal budget is maintained, but available processing bandwidth is wasted

Engineering Contradiction:
Improvethermal budgetVSAvoidprocessing bandwidth
Core Design Contradiction:
TemperatureVSProductivity

Solution Approach 1:

The system implements continuous monitoring of processor utilization metrics and thermal conditions, using this feedback to dynamically adjust operating frequencies. The feedback loop detects when a core is underutilized and allows another core to operate at higher frequencies, thereby recovering processing bandwidth that would otherwise be wasted due to conservative thermal limits.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system dynamically adjusts the operating frequency of processor cores based on real-time monitoring of utilization metrics and thermal conditions. The frequency can vary between minimum and maximum thresholds, allowing the system to optimize performance while staying within thermal budgets. This is achieved through continuous feedback loops that modify operational parameters on-the-fly.

Inventive Principle:
Principle #15Dynamics

4Productivity

If processor cores operate independently at their maximum capability, then individual core performance is optimized, but overall system thermal and power limits are exceeded

Engineering Contradiction:
Improveindividual core performanceVSAvoidsystem power budget
Core Design Contradiction:
ProductivityVSPower

Solution Approach 1:

The system merges the control of multiple processor cores under a unified power management framework that considers the aggregate power and thermal output of the entire system. Rather than allowing each core to operate independently at maximum capability, the system coordinates their operation to ensure the combined power consumption remains within system budgets, while still allowing individual cores to achieve high performance when conditions permit.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7490254B2Increasing workload performance of one or more cores on multiple core processors
Publication Date: 2009.02.10 ADVANCED MICRO DEVICES INC
  • US7490254B2 patent drawing
  • US7490254B2 patent drawing
  • US7490254B2 patent drawing

AI summary

A processing node that is integrated onto a single integrated circuit chip includes a first processor core and a second processor core. The processing node also includes an operating system executing on either of the first processor core and the second processor core. The operating system may monitor a current utilization of the first processor core and the second processor core. The operating system may cause the first processor core to operate at performance level that is lower than a system maximum performance level and the second processor core to operate at performance level that is higher than the system maximum performance level in response to detecting the first processor core operating below a utilization threshold.