Multi-core Gateway Protocol Synchronization
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Solution Overview
Problem
Complexity in controlling and synchronizing advanced, intelligent field devices in industrial process control systems due to the variety of communication protocols and software interfaces, leading to increased configuration efforts and interoperability challenges.
Innovation Solution
A system with a device integrator processor featuring multiple cores, each core controlling a set of devices and implementing redundancy schemes, allowing communication via multiple electronic data communication protocols simultaneously, enabling efficient interaction and failover capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple communication protocols are supported simultaneously, then interoperability with diverse field devices is improved, but device complexity increases
Solution Approach 1:
The processor is divided into multiple independent cores, each capable of handling a specific communication protocol. This segmentation allows the system to support multiple protocols simultaneously while keeping each core's complexity manageable, as each core is dedicated to a particular protocol stack and device type.
Solution Approach 2:
Each processor core is designed as a universal unit capable of being configured for different protocol types. The cores can be dynamically assigned to handle various communication protocols (HART, Fieldbus, 4-20mA, etc.), making the overall system universally compatible with diverse field devices without requiring separate dedicated hardware for each protocol.
2Reliability
If redundancy schemes are implemented, then system reliability is improved, but device complexity increases
Solution Approach 1:
The primary and shadow processor cores are merged into a single integrated processor unit, sharing common memory, I/O interfaces, and control logic. This merging allows redundancy to be implemented without proportionally increasing the physical device complexity, as the redundant core shares resources with the primary core rather than requiring completely separate hardware.
Solution Approach 2:
A shadow copy of the primary processor core is created to provide redundancy. The shadow core maintains an identical copy of the process control program and device state, ready to take over immediately if the primary core fails. This copying approach provides full redundancy while minimizing additional complexity through resource sharing.
3Productivity
If multiple processor cores are used, then control capability for separate device sets is improved, but configuration complexity increases
Solution Approach 1:
The multiple processor cores automatically self-configure based on the device types they encounter on the network. Each core can independently detect the protocol being used by connected field devices and adjust its operation accordingly, reducing the need for manual configuration and lowering the complexity of system setup while maintaining high device control capacity.
Data Source
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AI summary
Controlling and communicating with separate sets of industrial process control devices via separate data protocols simultaneously with a single processing device that utilizes redundancy and task-splitting to increase availability. An exemplary system includes a device integrator processor configured to receive and transmit electronic data via a plurality of protocols simultaneously. In one form, the device integrator processor includes a primary module that primarily controls communications and synchronizes itself with a shadow module of the processor. In another form, the processor includes multiple cores that each control a set of devices. Moreover, the cores implement a redundancy scheme.