Multi-core Packet Processing with Flow-based Load Balancing
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Solution Overview
Problem
In packet communication networks, directing all packets of a flow to the same processing core to maintain sequential order can lead to bottlenecks due to uneven processing loads among multiple cores, limiting the ability to balance load and causing potential out-of-order packet transmission.
Innovation Solution
A packet processing device with a multi-core CPU and NIC that distributes incoming data packets among multiple cores in alternation, ensuring outgoing packets are queued and transmitted in the same sequential order without requiring shared state among cores, using novel queue management techniques between the NIC and CPU.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all packets of a flow are directed to the same processing core to maintain sequential order, then packet ordering is preserved, but processing load becomes uneven and bottlenecks occur
Solution Approach 1:
The patent segments the packet processing workload by distributing different flows to different cores. Each core is assigned a specific flow identifier range, allowing parallel processing of multiple flows simultaneously. This segmentation enables load balancing while maintaining ordering within each flow through the flow identifier-based routing mechanism.
Solution Approach 2:
The patent introduces a flow identifier as an intermediary element that mediates between packet arrival and core selection. The flow identifier acts as a key that determines which core should process which packets, enabling ordered processing without requiring all packets to go to a single core. This intermediary allows the system to maintain ordering semantics while distributing workload.
2Productivity
If packets are distributed among multiple cores to balance load, then processing throughput improves, but packet ordering may be compromised
Solution Approach 1:
The patent applies local quality by ensuring that each core processes packets with specific flow identifiers in the correct sequential order. Within the scope of its assigned flow range, each core maintains proper packet ordering. The system accepts that different cores handle different flows, so ordering is maintained locally per flow rather than globally across all packets.
3Reliability
If shared state is maintained among cores to ensure ordering, then packet ordering is preserved, but device complexity increases
Solution Approach 1:
The patent extracts the ordering management function from shared state and relocates it to the flow identifier field in the packet header. Instead of requiring complex shared state among cores to track packet order, the system uses the flow identifier to determine routing decisions. This extraction simplifies the system by eliminating the need for inter-core coordination mechanisms.
Solution Approach 2:
The packet processing system becomes self-organizing through the flow identifier mechanism. Each packet carries its own flow identifier, which automatically determines which core should process it. This self-service approach eliminates the need for external coordination or shared state management, as the packet itself provides the information needed for correct routing and ordering.
4Reliability
If sequential processing is used to maintain packet order, then ordering is preserved, but processing time increases
Solution Approach 1:
The patent introduces dynamic load distribution where packets are routed to different cores based on their flow identifiers. This dynamic approach allows the system to process multiple flows in parallel rather than sequentially. The routing decision is made dynamically at packet arrival time based on the flow identifier, enabling concurrent processing while maintaining ordering within each flow.
Data Source
AI summary
A packet processing device CPU, including multiple processing cores. A NIC, which is coupled to the CPU, includes at least one network port, receives a flow of incoming data packets in a sequential order from a packet communication network, and receive logic, which delivers the incoming data packets in the flow to a designated group of the cores for processing by the cores in the group, while distributing the incoming data packets to the cores in alternation among the cores in the group. In response to the incoming data packets, the cores in the group generate corresponding outgoing data packets and queue the outgoing data packets for transmission by the NIC in the sequential order of the incoming data packets. Transmit logic in the NIC transmits the outgoing data packets to the network in the sequential order via the at least one network port.