Multi-core Power Management via Idle Frequency Scaling

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High-frequency operation of non-idle cores in multi-core processor systems is limited by asynchronous execution of idle cores, which can overload the power supply and cause system failure, necessitating a mechanism to facilitate high-frequency operation while managing asynchronous timing events.

Innovation Solution

A system that detects wakeup events for idle processors and configures them to resume operation at a reduced frequency, allowing more power to be allocated to active processors, with the option to increase frequency if the workload exceeds a threshold.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If idle cores are allowed to resume operation at full frequency when wakeup events occur, then system computational performance is improved, but power supply overload occurs causing system failure

Engineering Contradiction:
Improvecomputational performanceVSAvoidsystem stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies dynamics by making the operating frequency adjustable rather than fixed. Idle cores dynamically change their frequency based on system conditions - operating at reduced frequency during high-performance periods of other cores, and scaling up when power is available. This resolves the contradiction by allowing full frequency when safe while preventing overload when risky.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the frequency parameter of idle cores based on system state. When non-idle cores are overclocking, idle cores operate at reduced frequency to prevent power overload. When power headroom exists, idle cores can operate at full frequency. This parameter adjustment resolves the contradiction between maintaining performance and preventing system failure.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If non-idle cores are overclocked to increase computational performance, then productivity is improved, but power consumption increases risking power supply overload

Engineering Contradiction:
Improvecomputational performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by allowing different frequency states for different cores based on their operational status. Non-idle cores can be overclocked when idle cores are present to absorb power, while idle cores operate at reduced frequency. This creates localized high-performance zones without overloading the overall power supply, resolving the contradiction between performance and power consumption.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system dynamically adjusts frequency allocation across cores based on real-time power availability and workload distribution. When idle cores detect power headroom, they enable overclocking of active cores. This dynamic adaptation allows high power consumption for performance when safe, preventing overload when unsafe.

Inventive Principle:
Principle #15Dynamics

3Reliability

If idle cores operate at reduced frequency to prevent power overload, then power supply stability is improved, but system throughput decreases

Engineering Contradiction:
Improvepower supply stabilityVSAvoidsystem throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements periodic action through asynchronous wakeup events that trigger idle cores to resume operation at intervals. During these periodic wakeups, idle cores can service events and contribute to system throughput. Between wakeups, they operate at reduced frequency for stability. This periodic engagement resolves the contradiction by maintaining stability while preserving throughput through event-driven activity.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

Idle cores perform self-service by autonomously detecting power availability and adjusting their own frequency operation. They service wakeup events independently when they occur, contributing to system throughput without requiring continuous high-frequency operation. This self-service approach maintains power stability while preserving necessary system functionality.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8726055B2Multi-core power management
Publication Date: 2014.05.13 APPLE INC
  • US8726055B2 patent drawing
  • US8726055B2 patent drawing
  • US8726055B2 patent drawing

AI summary

The disclosed embodiments provide a system that operates a processor in a multi-core processor system. During operation, the system detects the creation of an asynchronous wakeup event for the processor. In response to detecting the creation of the asynchronous wakeup event, when the processor is subsequently placed into an idle state, the system configures the processor to resume operation at a reduced frequency that is a fraction of an operating frequency for the multi-core processor system, wherein the reduced frequency allows more power to be allocated to other processors in the multi-core processor system.