Multi-Core Processor Dual-Buffer Architecture for Low-Latency Image Processing
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Solution Overview
Problem
Existing multi-core processor systems face inefficiencies in image processing tasks due to high computational latencies and resource demands, particularly in handling two- and three-dimensional image data.
Innovation Solution
A multi-core processor system with shared memory and dual global buffers is configured to distribute a kernel across stream processors for concurrent thread execution, alternating access modes between global buffers to reduce latencies, and synchronize data efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a multi-core processor system uses conventional memory access methods for image processing, then computational tasks can be performed, but computational latencies are high
Solution Approach 1:
The patent divides the image processing workflow into distinct segments: forward transform, processing, and backward transform. Each segment operates on data in specific memory locations (global buffers or shared memory), allowing parallel execution of multiple threads within each segment while maintaining data integrity. This segmentation enables the system to achieve high throughput without excessive latencies by processing different image data portions simultaneously.
Solution Approach 2:
The patent implements preliminary actions by pre-positioning data in global buffers before processing begins. The first global buffer is prepared with intermediary input image data before the forward transform starts, and the second global buffer is ready to receive backward transformed data. This preliminary data preparation eliminates wait times during processing operations, significantly reducing computational latencies.
2Productivity
If global buffers are accessed frequently during concurrent thread execution, then processing throughput increases, but access conflicts and synchronization overhead increase
Solution Approach 1:
The patent assigns specific memory locations to specific processing stages: the first global buffer is dedicated to providing intermediary input image data for the forward transform, while the second global buffer is dedicated to receiving backward transformed data. Stream processors access only their assigned memory locations during specific processing phases, eliminating access conflicts and reducing synchronization overhead while maintaining high throughput.
Solution Approach 2:
The patent introduces global buffers as intermediary structures between the host memory and stream processor shared memory. These buffers act as mediators that decouple the data transfer operations from the processing operations, allowing concurrent access without direct conflicts. The buffers absorb access pressure and provide stable data sources for multiple threads simultaneously.
3Manufacturing precision
If iterative processing steps are performed for image processing, then processing accuracy improves, but computational time increases
Solution Approach 1:
The patent ensures continuous useful action by maintaining an uninterrupted data flow through the iterative processing pipeline. While one set of threads performs forward transforms on the first global buffer, other threads simultaneously perform processing operations on results from previous iterations. The second global buffer continuously receives backward transformed data, ensuring no idle time between iterations. This continuity allows the system to achieve high processing accuracy through multiple iterations without proportionally increasing total computational time.
Data Source
AI summary
A multi-core processor system includes a plurality of processors, a first global buffer, and a second global buffer. The multi-core processor system distributes a kernel to the plurality of processors for concurrently executing a plurality of threads of the kernel by each processor. While each thread of the kernel is concurrently executed, processing steps defined within the kernel are iteratively performed. The processing steps include (i) computing a forward transform of intermediary input image data, received from the first global buffer, and providing the forward transformed data to the shared memory, (ii) processing the forward transformed data to provide the processed data to the shared memory, (iii) computing a backward transform of the processed data and providing the backward transformed data to the second global buffer, and (iv) synchronizing the first global buffer between the plurality of processors before the first global buffer provides the intermediary input image data.