Multi-Core Processor Power Control for Inverse Temperature Effects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Microprocessors face inefficiencies due to the inverse temperature dependency (ITD) effect, where transistors slow down at lower temperatures, leading to increased power consumption and performance throttling, which existing compensation methods fail to adequately address.
Innovation Solution
A control circuitry selects processor cores based on temperature and power consumption, prioritizing cores with higher temperatures and adjusting supply voltage to maintain performance while minimizing power usage, and strategically waking up additional cores to manage thermal interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If supply voltage is increased to compensate for ITD effect, then transistor speed is improved, but power consumption increases
Solution Approach 1:
The patent applies local quality by selectively increasing supply voltage only to specific processor cores that are actively processing tasks and experiencing ITD effects, rather than uniformly increasing voltage across all cores. This targeted approach compensates for temperature-related speed degradation in active cores while minimizing power consumption increases in idle or low-activity cores.
Solution Approach 2:
The patent implements dynamic voltage adjustment where the supply voltage to processor cores is continuously adapted based on real-time temperature measurements and workload conditions. The voltage frequency compensation mechanism dynamically modifies voltage levels in response to changing operational conditions, optimizing the balance between transistor speed and power consumption.
2Productivity
If processor cores are kept in active state to avoid throttling, then performance is maintained, but power consumption increases
Solution Approach 1:
The patent applies preliminary action by proactively managing processor core states based on predicted workload patterns and temperature trends. The system anticipates potential throttling conditions and adjusts core activation, voltage levels, and frequency settings in advance to maintain performance while minimizing power consumption, rather than reactively responding to throttling events.
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting multiple operational parameters including supply voltage, clock frequency, and core activation states based on temperature conditions and workload demands. This multi-parameter optimization allows the system to maintain performance levels while reducing power consumption by operating cores at optimal parameter combinations rather than always maintaining full active state.
3Reliability
If voltage vs. temperature slope is increased, then ITD compensation is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic adjustment of the voltage vs. temperature compensation slope based on actual processor core conditions. Rather than using a fixed aggressive compensation slope that would increase power consumption, the system dynamically adapts the voltage adjustment magnitude to match the actual ITD effects observed in each core, optimizing the balance between compensation effectiveness and power efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption and prevents thermal throttling by optimizing core selection and voltage adjustment, enhancing overall system efficiency and performance.
Implementation Method 1
temperature sensors (e.g., temperature sensing diodes) arranged to generate temperature information that is associated with respective individual processor cores
Implementation Method 2
According to the inverse temperature dependency (ITD) device effect, transistors slow down as temperature decreases for supply voltages below a threshold limit
Data Source
AI summary
Embodiments herein relate to techniques to select one or more processor cores, of a multi-core processor, for a workload based on a temperature associated with the processor cores. The processor circuitry may further include temperature sensors (e.g., temperature sensing diodes) arranged to generate temperature information that is associated with respective individual processor cores of the plurality of processor cores. It may be determined that one or more of the processor cores need to be woken up from a low power state to handle a workload. A control circuitry may receive the temperature information and may select a first processor core, of the plurality of processor cores, to wakeup from the low power state based on the temperature information. For example, the control circuitry may prioritize the processor core with the highest temperature according to the temperature information. Other embodiments may be described and claimed.