Multi-Core Scheduler for Image Processing Efficiency
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Solution Overview
Problem
Image processing apparatuses with multi-core processors connected to peripheral units without mounted processors face inefficiencies in task allocation, as existing methods are not applicable to kernel operations of certain OS, leading to increased processing loads across all cores.
Innovation Solution
The image processing apparatus dynamically allocates control programs to cores using symmetric and asymmetric multi-processing, determining whether a processor is mounted to the peripheral unit to optimize core usage, with one core handling peripheral control tasks in asymmetric mode and others in symmetric mode for efficient processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If dynamic task allocation across multi-cores is implemented, then processing efficiency is improved, but system complexity increases due to OS kernel operation requirements
Solution Approach 1:
The patent implements dynamic task allocation by switching between SMP and AMP modes based on peripheral unit conditions. The scheduler dynamically determines whether to allocate tasks symmetrically across all cores or asymmetrically with dedicated peripheral control cores, allowing the system to adapt its architecture at runtime without requiring complex manual reconfiguration.
Solution Approach 2:
The system changes operational parameters by switching between different multi-processing modes (SMP/AMP). When a peripheral unit without a processor is detected, the system changes the allocation parameter to AMP mode, assigning specific cores to peripheral control. When all peripherals have processors, it switches to SMP mode for balanced distribution, thereby optimizing performance based on detected system state.
2Reliability
If all cores execute control programs for peripherals without processors, then peripheral control is maintained, but processing load on all cores increases
Solution Approach 1:
The patent applies asymmetric multi-processing by designating specific cores for peripheral control tasks when peripheral units lack processors. Instead of distributing peripheral control uniformly across all cores, the system assigns dedicated cores to handle peripheral functions, creating an asymmetric allocation that isolates peripheral control workload from image processing tasks.
Solution Approach 2:
The system segments control programs into peripheral control tasks and image processing tasks. By separating these functional domains and assigning them to different core sets, the patent prevents peripheral control overhead from uniformly increasing the processing load across all cores, thereby maintaining image processing performance.
3Ease of operation
If fixed core allocation is used, then control is simplified, but processing efficiency decreases when peripheral conditions change
Solution Approach 1:
The patent transitions from static to dynamic core allocation by implementing a scheduler that automatically adjusts task distribution based on peripheral unit detection. The system monitors whether connected peripherals have processors and dynamically reconfigures core allocation accordingly, maintaining simplicity through automated decision-making rather than manual configuration.
Data Source
AI summary
A scheduler of an image processing apparatus allocates processing of control programs of the image processing apparatus to a plurality of cores when it is determined that a processor is mounted to a peripheral unit. The scheduler allocates a control program of the peripheral unit and a program related to a control program for the peripheral unit among the control programs of the image processing apparatus to at least one core among the plurality of cores and allocates remaining control programs among the control programs of the image processing apparatus to remaining cores among the plurality of cores when it is determined that a processor is not mounted to the peripheral unit.


