Multi-Core Processor Synchronous Switching for Avionics Partitioning
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Solution Overview
Problem
The use of multi-core processors in avionics platforms poses challenges due to resource contention among cores, leading to unpredictable behavior and difficulties in platform qualification, especially under the DO297 standard, as existing architectures like SMP and AMP are not sufficiently deterministic.
Innovation Solution
Implementing a method that synchronizes cores and segments software application execution into temporal zones using multi-core synchronous switching to achieve robust partitioning, allowing for controlled contention and facilitating platform qualification.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-core processors are used to execute multiple software applications simultaneously, then processing capacity and productivity are improved, but resource contention occurs leading to unpredictable behavior and difficulty in platform qualification
Solution Approach 1:
The patent segments the execution time of the multi-core processor into distinct temporal zones (first temporal zone, second temporal zone) where different sets of software applications are executed exclusively on specific cores. This temporal segmentation eliminates resource contention by ensuring that during each temporal zone, designated cores are dedicated to specific applications, providing deterministic and predictable behavior while maintaining high processing capacity through parallel execution across different time periods.
2Device complexity
If cores share common resources (bus, memory) for simultaneous execution, then device complexity is reduced, but contention occurs causing execution delays
Solution Approach 1:
The patent implements periodic temporal zones that alternately dedicate cores to different sets of software applications. During each periodic temporal zone, specific cores are exclusively assigned to specific applications, eliminating contention for shared resources like bus and memory. This periodic dedication maintains the physical resource-sharing architecture while preventing execution delays through time-division isolation.
3Ease of operation
If a single operating system manages all cores (SMP architecture), then ease of operation is improved, but deterministic control over core behavior is reduced
Solution Approach 1:
The patent segments the operation of the single operating system into distinct temporal zones where different sets of software applications are managed exclusively on specific cores. During each temporal zone, the operating system provides deterministic control by ensuring that designated cores execute only their assigned applications without interference from other applications. This temporal segmentation maintains ease of operation through a single operating system while achieving deterministic behavior through time-division core assignment.
Data Source
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AI summary
The invention relates to a method for implementing partitioning during the execution of software applications (14) on a platform (16) comprising a multi-core processor (26) having a plurality of separate cores, which is implemented by an electronic implementation device (24). The method includes a step of switching between the execution of a current set of software applications (14) on a plurality of cores and the execution of a subsequent set of software applications (14) on the plurality of cores, carried out in a synchronous manner on said plurality of cores, the step of synchronous multi-core switching including one or more actions among a first group of actions that consist of: - waiting, synchronised over the plurality of cores, for uninterruptible processes of the current set of software applications (14) to finish running; and - purging all memory resources associated with the current set of software applications (14).