Multi-Depth Semiconductor Region Photoelectric Conversion Device
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Solution Overview
Problem
Photoelectric conversion devices face challenges in achieving high sensitivity while suppressing noise in the output signal, particularly in devices with large photodiodes used for automatic focus detection, exposure adjustment, and radioactive ray detection, where increasing saturation charge amount is desired without introducing noise.
Innovation Solution
A photoelectric conversion device is designed with a specific semiconductor region structure that includes multiple conductivity type regions to optimize signal charge generation and conversion, featuring a p-n junction photodiode with n-type and p-type semiconductor regions arranged in a manner that enhances charge accumulation and readout efficiency, reducing noise and increasing saturation charge capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the photodiode area is increased to increase saturation charge amount, then sensitivity is improved, but noise in the output signal increases
Solution Approach 1:
The patent divides the photodiode structure into multiple semiconductor regions with different conductivity types (first conductivity type and second conductivity type regions) arranged in a specific pattern. This segmentation allows the large photodiode area to be divided into functional zones that generate signal charge while suppressing noise, resolving the contradiction between sensitivity and noise.
Solution Approach 2:
The patent applies different conductivity types to different local regions of the photodiode structure. Specifically, first conductivity type semiconductor regions and second conductivity type semiconductor regions are distributed throughout the photodiode, creating local variations in electrical properties that optimize both signal generation and noise suppression in different areas.
2Measurement precision
If the saturation charge amount is increased to improve sensitivity, then detection capability is enhanced, but device complexity increases
Solution Approach 1:
The patent combines multiple semiconductor regions of different conductivity types within a single photodiode structure to achieve high saturation charge amount. By merging these regions into one integrated device, the patent enhances detection capability without proportionally increasing device complexity.
Solution Approach 2:
The patent extends the photodiode structure into the depth dimension by creating multiple semiconductor regions at different depths within the substrate. This three-dimensional arrangement increases saturation charge amount without significantly increasing the planar area, thereby improving detection capability while controlling device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves high sensitivity with reduced noise and improved signal readout rates by utilizing a multi-depth semiconductor region structure that minimizes capacitance at reset, thereby suppressing kTC noise and enabling a larger saturation charge amount.
Implementation Method 1
a photoelectric conversion unit that generates signal charge of first polarity in response to incident light
Data Source
AI summary
A photoelectric conversion device includes a photoelectric conversion unit that generates signal charge of a first polarity and a charge conversion circuit that converts the signal charge into a signal voltage. The photoelectric conversion unit includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type that are provided in a surface side of a semiconductor substrate, a third semiconductor region of the first conductivity type provided at a first depth, a fourth semiconductor region of the second conductivity type provided at a second depth and overlaps the second semiconductor region in a plan view, and a fifth semiconductor region of the first conductivity type provided at a third depth, and the third semiconductor region and the fifth semiconductor region overlap the first semiconductor region, the second semiconductor region, and the fourth semiconductor region in the plan view.