Multi-Die 3D IC Verification Using IO Trace Translation
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Solution Overview
Problem
Current 3D IC verification methodologies are time-consuming, labor-intensive, and require significant resources, as they necessitate simultaneous operation of all dies in a stack for functional verification, limiting efficiency and increasing development time.
Innovation Solution
A method that allows incremental reuse of a die verification environment by translating and applying IO traces between dies, enabling individual die verification without simultaneous operation of others, using a test bench and peripheral models, and converting IO traces between formats to facilitate efficient debugging and control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all dies in a stack are simultaneously operated for functional verification, then verification completeness is ensured, but verification time and resource consumption increase significantly
Solution Approach 1:
The verification process is segmented into individual die verification units. Each die can be verified independently by connecting it to a test bench separately, rather than requiring all dies to be operated simultaneously. This segmentation allows verification time to be divided into smaller, manageable portions for each die.
Solution Approach 2:
IO traces are generated and stored during the verification of one die before moving to the next die. These pre-generated IO traces serve as input for verifying subsequent dies, eliminating the need to re-simulate previous die interactions and reducing overall verification time.
2Reliability
If all dies in a stack are simultaneously operated for functional verification, then interaction between dies is captured, but verification complexity and labor intensity increase
Solution Approach 1:
IO traces act as intermediaries that capture the interaction behavior between dies. Instead of simultaneously operating all dies and capturing interactions directly in the simulation, IO traces serve as a mediator that records the interface behavior between consecutive dies, simplifying the verification process while maintaining interaction verification completeness.
Solution Approach 2:
IO traces create a copy of the interaction behavior between dies. Rather than requiring actual simultaneous operation of all dies to capture interactions, the system creates textual representations (IO traces) of the interface transactions, which can then be reused for verifying subsequent dies without re-simulating the entire stack.
3Measurement precision
If traditional verification methodology is used, then signal-level verification is achieved, but functional verification at higher levels is limited
Solution Approach 1:
The verification methodology is designed to be universal and multi-functional. The same test bench and verification framework can verify individual dies at signal level, verify functional interactions between dies using IO traces, and scale to verify entire stacks. This multi-functionality allows the system to adapt to different verification levels and requirements without requiring separate verification systems.
Data Source
AI summary
A system and method is disclosed for functional verification of multi-die 3D ICs. The system and method include a reusable verification environment for testing each die in a stack of dies individually without having to simultaneously operate all of the dies in the stack. The system and method includes converting an input/output (“IO”) trace from a die verification test from a first format to a second format to improve performance.