Multi-Die Bridge Assembly for Small-Pitch 3D Packaging

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Solution Overview

Problem

Existing 3D semiconductor packaging methodologies face challenges in achieving high bump density, power efficiency, and bandwidth while dealing with complex fabrication and high costs, particularly in die-to-die and die-to-wafer bonding processes.

Innovation Solution

Implementing multi-die bridge assemblies that integrate hybrid bonding (HBI) with solder-attach components, utilizing hybrid bond interconnects (HBI) for small pitches and through-silicon vias (TSVs) to enhance electrical pathways and reduce substrate routing layers, combined with various attachment methods like solder bumps and thermal compression bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If die-to-die and die-to-wafer bonding methods are used to achieve high bump density and bandwidth, then packaging performance is improved, but fabrication complexity and cost increase

Engineering Contradiction:
Improvebump densityVSAvoidfabrication complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the bonding process into two distinct stages: first forming solder bumps on the substrate, then performing die attachment. This segmentation allows each stage to be optimized independently, reducing overall fabrication complexity while achieving high bump density through the initial solder bump formation step

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by pre-forming solder bumps on the substrate before die attachment. This preliminary solder bump formation enables subsequent die bonding to proceed more easily and reduces the complexity of the overall process, as the interconnect structure is already in place to guide alignment and bonding

Inventive Principle:
Principle #10Preliminary action

2Power

If through-silicon vias (TSVs) are implemented to enhance electrical pathways, then current capacity is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvecurrent capacityVSAvoidmanufacturing complexity
Core Design Contradiction:
PowerVSEase of manufacture

Solution Approach 1:

The patent uses solder bumps as an intermediary structure that provides both mechanical support and electrical connection. This intermediary approach achieves enhanced current capacity without requiring through-silicon vias, as the solder bumps serve as the primary current pathway between substrate and die, simplifying manufacturing

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts the complex TSV manufacturing process from the overall fabrication sequence and replaces it with a simpler solder bump formation process. This extraction eliminates the need for drilling, plating, and filling operations associated with TSVs, reducing manufacturing complexity while maintaining current capacity through alternative solder-based interconnects

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If hybrid bonding is used for small pitch integration, then bump density is improved, but fabrication complexity and cost increase

Engineering Contradiction:
Improvebump densityVSAvoidfabrication complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent applies local quality by using solder bumps specifically at the interconnect locations where high density is needed, rather than requiring hybrid bonding across the entire die surface. This localized approach achieves small pitch integration benefits at critical points while keeping the overall fabrication process simpler and more cost-effective

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables small pitch integration, improved current capacity, and reduced fabrication complexity, leading to enhanced semiconductor packaging performance and cost-effectiveness.

Implementation Method 1

solder-attach components, utilizing hybrid bond interconnects (HBI) for small pitches and through-silicon vias (TSVs) to enhance electrical pathways

Methodology Applied
Scientific EffectSoldering: Soldering

Implementation Method 2

Implementing multi-die bridge assemblies that integrate hybrid bonding (HBI) with solder-attach components

Methodology Applied
Scientific EffectHybrid bonding:

Implementation Method 3

combined with various attachment methods like solder bumps and thermal compression bonding

Methodology Applied
Scientific EffectThermal compression bonding:

Data Source

PatentUS20250266395A1Multi-die bridge assemblies and methods for three-dimensional packaging
Publication Date: 2025.08.21 INTEL CORP
  • US20250266395A1 patent drawing
  • US20250266395A1 patent drawing
  • US20250266395A1 patent drawing

AI summary

Multi-die bridge assemblies and methods for three-dimensional packaging. The architectures assemble a bridge component with two or more integrated circuit die to thereby create a multi-die (MD) bridge assembly. The means for attaching the bridge component to the dies can be hybrid bonding, solder bumps, thermal compression bonding, or a combination thereof. The created MD bridge assembly can be subjected to performance testing prior to attachment to a substrate. Attaching the MD bridge assembly to the substrate can include fitting the bridge component portion into a cavity in the substrate and attaching the bridge component to a cavity floor with another plurality of attachment options.