Multi-Die System Semiconductor for Chiplet IP Protection

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Solution Overview

Problem

The increasing cost of intellectual property royalties and development costs due to miniaturization in semiconductor processes, coupled with high costs for layout and backend transformation, hinders efficient development and verification of new semiconductor products.

Innovation Solution

A system semiconductor is configured by separating components into high-cost and low-cost dies, with selective management of intellectual property rights and use of chiplet interfaces to enable only permitted components, reducing overall development costs and protecting IP rights.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If components are integrated into a single system semiconductor, then functionality is improved, but development cost increases exponentially

Engineering Contradiction:

ImprovefunctionalityVSAvoiddevelopment cost

Core Design Contradiction:

Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The system semiconductor is divided into multiple independent dies, each containing specific components. High-cost dies can be reused across multiple projects while low-cost dies are customized per project, thereby segmenting the development cost structure and reducing overall expenditure.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Certain dies are designed with universal functionality that can be reused across different system semiconductor configurations. These reusable dies contain components that are commonly needed across multiple projects, eliminating the need to redevelop them for each new system.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If intellectual property rights are protected through traditional methods, then IP security is improved, but development cost and complexity increase

Engineering Contradiction:

ImproveIP securityVSAvoiddevelopment complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

IP rights are managed at the die level rather than system level. Each die can have its own IP protection mechanisms and licensing terms, allowing granular control over which components are protected and under what conditions, thereby reducing overall complexity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A die-level management mechanism acts as an intermediary between IP owners and system integrators. This intermediary layer handles IP verification, licensing, and protection independently for each die, simplifying the overall IP management process.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS12566721B2System semiconductor with multi project chip for protecting intellectual property right of the system semiconductor and the method thereof

Publication Date: 2026.03.03 NEOWINE CO LTD

AI summary

A system semiconductor according to the present invention may include a common die including one or more components; and a special die having one or more components, wherein the common die may include a first chiplet that interfaces between one or more components provided in the common die and one or more components provided in the special die, and the special die may include a second chiplet interface unit that implements an interface between one or more components provided in the special die and one or more components provided in the common die.