Multi-Die Clock Stop Trigger via Global Signal Coordination
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Solution Overview
Problem
Synchronizing a triggered clock stop across multiple semiconductor dies in computing systems is challenging, as existing technologies struggle to halt clocks rapidly and asynchronously across all dies, which is crucial for capturing relevant debug information.
Innovation Solution
A computing system with multiple semiconductor dies shares a global clock stop trigger signal, where each die has a clock generation unit that stops local clocks upon detecting a local trigger, and notifies other dies to stop their clocks, ensuring a rapid and asynchronous clock stop across all dies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a global clock stop trigger signal is shared across multiple semiconductor dies, then the synchronization of clock stop across all dies is improved, but the device complexity increases due to the need for inter-die signal routing and coordination
Solution Approach 1:
The system divides the clock stop trigger functionality into local and global components. Each die has local trigger logic that can independently detect errors and generate local stop triggers, while also monitoring a shared global trigger signal. This segmentation allows each die to operate autonomously for local errors while participating in coordinated global stop when needed, resolving the contradiction by distributing complexity across multiple independent units.
Solution Approach 2:
The patent introduces a global clock stop trigger signal as an intermediary mechanism that mediates between multiple semiconductor dies. This single shared signal acts as a coordinator that can simultaneously trigger clock stops across all dies without requiring complex peer-to-peer communication protocols, thus improving synchronization while keeping the coordination mechanism simple.
2Speed
If local clock stop triggers are detected immediately, then the speed of capturing debug information is improved, but the reliability of synchronized state capture across all dies deteriorates due to asynchronous stopping
Solution Approach 1:
The patent merges local and global trigger mechanisms into a unified clock stop system. Each die responds to both local triggers (for immediate local errors) and the global trigger signal (for system-wide coordination). This merging ensures that regardless of whether a stop is triggered locally or globally, all dies achieve synchronized state capture by the time the global signal propagates, maintaining both speed and reliability.
Solution Approach 2:
The system implements feedback through the global clock stop trigger signal that provides status information about the stop state across all dies. When any die detects an error and stops its clock, it can assert the global trigger signal, which then provides feedback to other dies to ensure they also stop their clocks, guaranteeing synchronized state capture while maintaining fast response through immediate local detection.
Data Source
AI summary
Systems, apparatuses, and methods for implementing a multi-die clock stop trigger are described. A computing system includes a plurality of semiconductor dies connected together and sharing a global clock stop trigger signal which is pulled high via a resistor tied to a supply voltage. Each semiconductor die has a clock generation unit which generates local clocks for the die. Each clock generation unit monitors for local clock stop triggers, and if one of the local triggers is detected, the clock generation unit stops local clocks on the die and pulls the global clock stop trigger signal low. When the other clock generation units on the other semiconductor dies detect the global clock stop trigger at the logic low level, these clock generation units also stop their local clocks. Captured data is then retrieved from the computing system for further analysis.