Multi-Die Package Structure With Coplanar 3D Integration

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Solution Overview

Problem

Semiconductor electronic devices face challenges in scaling down while maintaining electrical characteristics, quality, cost, and yield, necessitating enhanced integration levels that existing semiconductor integration technologies struggle to achieve with a single chip.

Innovation Solution

A package structure comprising a molded structure with multiple electronic devices, including a first and second top die, encapsulated by an encapsulant, and electrically connected through bonding pads, allowing for differential functions and coplanar surfaces for improved integration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If semiconductor electronic devices are scaled down to meet application demands, then device size is reduced, but electrical characteristics and quality deteriorate

Engineering Contradiction:
Improvedevice sizeVSAvoidelectrical characteristics
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent divides a single semiconductor device into multiple separate semiconductor devices (first, second, and third semiconductor devices) with different functions. These segmented devices are integrated within a single package structure, allowing each device to maintain its electrical characteristics while achieving compact overall integration. The segmentation principle resolves the contradiction by enabling functional division without requiring excessive miniaturization of individual components.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from planar integration to three-dimensional vertical integration by stacking multiple semiconductor devices at different heights within the package. The first and second semiconductor devices are positioned at different vertical levels and connected through vertical conductive structures. This dimensional change allows multiple functional devices to coexist in a compact volume without compromising their electrical performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If multiple semiconductor chips are included in semiconductor packages to enhance integration level, then integration capability is improved, but device complexity increases

Engineering Contradiction:
Improveintegration capabilityVSAvoidpackage structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent designs a universal package structure that can accommodate multiple semiconductor devices with different functions (first, second, and third semiconductor devices). The common package body, shared encapsulant, and standardized connection interfaces enable this multi-functional integration. This universality allows the package to achieve high integration capability while maintaining a relatively simple and standardized structure, avoiding the complexity that would arise from custom-designed multi-chip packages.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges multiple semiconductor devices into a single integrated package structure with a common package body and shared encapsulant. The first, second, and third semiconductor devices are combined within this unified structure, with their electrical connections achieved through integrated conductive paths. This merging approach simplifies the overall package design compared to separate packaging, reducing the complexity of handling and interconnecting multiple independent packages.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If coplanar surfaces are achieved for multiple electronic devices, then integration and electrical connectivity are enhanced, but manufacturing precision requirements increase

Engineering Contradiction:
Improveelectrical connectivityVSAvoidsurface alignment
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent introduces an intermediary approach by using the package body and encapsulant as mediating structures that facilitate the integration of multiple semiconductor devices. These intermediary components provide a common reference framework that helps align the first, second, and third semiconductor devices in coplanar or near-coplanar arrangements. The intermediary structures absorb and compensate for manufacturing tolerances, reducing the precision requirements compared to direct device-to-device alignment.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250329596A1Package structure including at least two dice, assembly structure and method of manufacturing the same
Publication Date: 2025.10.23 NAN YA TECH
  • US20250329596A1 patent drawing
  • US20250329596A1 patent drawing
  • US20250329596A1 patent drawing

AI summary

A package structure, an assembly structure and a manufacturing method are provided. The package structure includes a molded structure, a first top die and a second top die. The molded structure includes a first electronic device, a second electronic device and an encapsulant encapsulating the first electronic device and the second electronic device. The first top die is electrically connected to the first electronic device and the second electronic device. The second top die is electrically connected to the second electronic device.