Multi-Die Communication Network with Direct Die-to-Die Interconnects
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Solution Overview
Problem
Conventional microelectronic assemblies face challenges in efficiently communicating large numbers of signals between multiple integrated circuit (IC) dies due to their small size, thermal constraints, and power delivery limitations, which restricts design flexibility and increases costs.
Innovation Solution
The implementation of a microelectronic assembly with a package substrate and multiple dies connected via different interconnects, including die-to-package substrate (DTPS) and die-to-die (DTD) interconnects, which form a communication network allowing direct communication between dies without relying on the package substrate for power delivery, enabling higher bandwidth and reduced size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional substrates are used to couple integrated circuit dies, then mechanical stability is achieved, but interconnect pitch is constrained by manufacturing, materials, and thermal considerations
Solution Approach 1:
The system segments the interconnect function into two distinct pathways: DTPS interconnects for power delivery and ground connections, and DTD interconnects for signal communication. This segmentation allows each interconnect type to be optimized independently, enabling fine-pitch DTD interconnects for high-density communication while DTPS interconnects handle power delivery requirements, thus resolving the contradiction between mechanical stability and interconnect pitch flexibility
Solution Approach 2:
The package substrate acts as an intermediary that facilitates direct die-to-die communication pathways. By introducing this intermediary structure, the system enables fine-pitch interconnects between dies without being constrained by conventional substrate limitations, as the substrate provides the structural framework while the communication signals travel through dedicated DTD interconnects
2Reliability
If conventional substrate-based communication is used, then signal transmission is achieved, but bandwidth is limited and size increases
Solution Approach 1:
The system separates power delivery functions from signal communication functions by using distinct interconnect pathways. DTPS interconnects are dedicated to power and ground, while DTD interconnects handle all communication signals. This segmentation eliminates power delivery constraints from the communication pathway, enabling higher bandwidth signal transmission through optimized DTD interconnects
Solution Approach 2:
The system transitions from conventional two-dimensional substrate-based signal routing to a three-dimensional architecture with direct vertical and lateral die-to-die pathways. This dimensional change enables shorter signal paths and higher bandwidth communication while reducing the overall package size
3Ease of manufacture
If multiple IC dies are attached with conventional methods, then assembly is achieved, but power efficiency decreases and design flexibility is restricted
Solution Approach 1:
The system segments power delivery through DTPS interconnects while communication occurs through DTD interconnects. This segmentation allows power to be delivered efficiently through optimized pathways while communication signals traverse direct die-to-die paths, reducing signal loss and improving overall power efficiency compared to conventional substrate-routed signals
Solution Approach 2:
The system changes the architectural parameters by implementing direct die-to-die coupling with fine-pitch interconnects, transitioning from conventional coarse-pitch substrate routing. This parameter change enables shorter signal paths, lower resistance, and improved power efficiency while enhancing design flexibility for multi-die configurations
Data Source
AI summary
Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate, a first die coupled to the package substrate with first interconnects, and a second die coupled to the first die with second interconnects, wherein the second die is coupled to the package substrate with third interconnects, a communication network is at least partially included in the first die and at least partially included in the second die, and the communication network includes a communication pathway between the first die and the second die.