Multi-Die ECC Architecture for High RBER Memory Recovery

The patent segments the error correction capability by introducing a hierarchical structure: traditional ECC is applied to each individual memory die, while a super-BCH code is applied across multiple dies. This segmentation allows each layer to handle errors independently, with the super-BCH layer providing additional protection when multiple dies fail, thereby improving RBER resilience without requiring complete redesign of the entire error correction system.

The patent implements nested error correction by embedding traditional ECC codes within a broader super-BCH code structure. The super-BCH code encompasses multiple memory dies and their individual ECC-protected codewords, creating a nested hierarchy where inner ECC layers handle die-level errors and outer super-BCH layers handle multi-die failures. This nesting enables progressive error correction without increasing overall system complexity significantly.

The patent applies preliminary error correction by first using traditional ECC to correct errors within each individual memory die before the data is combined into super-BCH codewords. This preliminary correction reduces the error burden on the super-BCH decoding stage, allowing it to focus on correcting residual errors across multiple dies. This two-stage preliminary action improves data integrity while managing decoding complexity by pre-processing errors at the die level.

The patent introduces an intermediary layer of super-BCH encoding that mediates between individual die-level ECC codes and the final data recovery process. The super-BCH code acts as an intermediary structure that combines multiple ECC-protected codewords and provides an additional layer of error correction. This intermediary approach enables the system to achieve 10x improved RBER resilience while keeping the complexity manageable by distributing the correction burden across multiple hierarchical levels rather than requiring a single complex correction mechanism.

The patent segments error correction into two distinct functional segments: die-level ECC correction handling individual die errors, and super-BCH correction handling multi-die errors. This segmentation allows each segment to be optimized for its specific error type, with traditional ECC providing fast single-die correction and super-BCH providing comprehensive multi-die protection. The segmentation improves error correction capability while maintaining relatively low complexity by avoiding a single monolithic complex correction system.

The patent creates a composite error correction system by combining traditional ECC codes with super-BCH codes in a hierarchical structure. Similar to composite materials in engineering, this composite approach combines the strengths of different error correction techniques: the simplicity and speed of traditional ECC with the powerful multi-error correction capability of super-BCH codes. This composite structure enables the system to correct both single-bit and multi-bit errors across multiple dies while managing overall complexity through modular integration.