Multi-Die ECC Recovery for Non-Volatile Memory Read Errors

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Solution Overview

Problem

Existing memory systems face challenges in improving raw bit error rate (RBER) performance, especially in encrypted memory, due to limitations in error correction and resilience against die failures in non-volatile memory systems.

Innovation Solution

A recovery algorithm is implemented in memory systems that uses error correction codes (ECC) spread across multiple dies, with a central die storing the XOR of contents, and a recovery process involving bit flipping and recalculating XOR operations to correct errors, ensuring data integrity and resilience.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ECC codeword is spread over multiple dies, then RBER performance is improved, but device complexity increases

Engineering Contradiction:
ImproveRBER performanceVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The ECC codeword is divided and distributed across multiple dies (first die, second die, third die) rather than storing the complete codeword in a single location. This segmentation allows the system to achieve RBER diversity advantage by spreading error exposure across different physical substrates, while the recovery algorithm reconstructs the original data by combining portions from each die.

Inventive Principle:
Principle #1Segmentation

2Reliability

If RAID mechanisms are used to store XOR of contents, then resilience to die failures is improved, but device complexity increases

Engineering Contradiction:
Improveresilience to die failuresVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses an intermediary recovery algorithm that performs XOR operations on portions of data retrieved from multiple dies to reconstruct the original data. Rather than requiring complex RAID hardware mechanisms, the intermediary software/firmware layer handles the complexity of distributed error correction and die failure recovery through algorithmic processing.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If complete ECC codeword is stored in single location, then device complexity is reduced, but RBER performance deteriorates

Engineering Contradiction:
Improvedevice complexityVSAvoidRBER performance
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The ECC codeword is divided into portions and distributed across multiple dies rather than storing the complete codeword in a single location. This segmentation provides RBER diversity advantage by exposing different portions of the codeword to different error conditions across dies, improving overall error correction capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-location storage model to a multi-dimensional distributed storage model across multiple dies. By adding the spatial dimension of distribution across separate dies, the system achieves improved RBER performance through diversity while maintaining manageable complexity through algorithmic reconstruction.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS9652321B2Recovery algorithm in non-volatile memory
Publication Date: 2017.05.16 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US9652321B2 patent drawing
  • US9652321B2 patent drawing
  • US9652321B2 patent drawing

AI summary

Apparatus, systems, and methods for Recovery algorithm in memory are described. In one embodiment, a controller comprises logic to receive a read request from a host device to read a line of data to the memory device, wherein the data is spread across a plurality (N) of dies and comprises an error correction code (ECC) spread across the plurality (N) of dies, retrieve the line of data from the memory device, perform an error correction code (ECC) check on the line of data retrieved from the memory device, and invoke a recovery algorithm in response to an error in the ECC check on the line of data retrieved from the memory device. Other embodiments are also disclosed and claimed.