Multi-Die Microelectronic Assembly With Fine-Pitch Interconnects
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional microelectronic assemblies face challenges in achieving reliable attachment of multiple IC dies due to thermal constraints, power delivery constraints, and limitations in interconnect pitch, which affect power efficiency, bandwidth, and design flexibility.
Innovation Solution
The microelectronic assemblies described include a package substrate with a dielectric material and photodefinable materials, along with die-to-package substrate interconnects and die-to-die interconnects, enabling efficient power delivery and signal transmission while allowing for higher density and flexibility in die arrangement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional substrates are used to couple integrated circuit dies, then mechanical stability is achieved, but interconnect pitch is constrained by manufacturing, materials, and thermal considerations
Solution Approach 1:
The patent changes the material parameters of the substrate by using a silicon interposer with different thermal and mechanical properties compared to conventional substrates. The silicon interposer has superior thermal conductivity and allows for smaller feature sizes, enabling reduced interconnect pitch while maintaining mechanical stability. This parameter change in the substrate material enables higher density interconnections without sacrificing reliability.
2Adaptability or versatility
If multiple IC dies are attached to facilitate connection to other components, then connectivity is improved, but thermal management becomes more challenging
Solution Approach 1:
The silicon interposer acts as an intermediary between the multiple IC dies and the external environment. It provides a centralized thermal management interface that can conduct heat away from multiple dies simultaneously. The interposer's high thermal conductivity allows it to serve as an effective heat sink, managing thermal loads from multiple connected components without requiring separate thermal solutions for each die.
3Productivity
If interconnect pitch is reduced to increase density, then bandwidth is improved, but manufacturing precision requirements increase
Solution Approach 1:
The patent utilizes the inherent properties of silicon as a material parameter change that enables smaller feature sizes with current manufacturing capabilities. Silicon's mechanical properties and compatibility with standard semiconductor fabrication processes allow for precise patterning at reduced pitch dimensions. This material selection change enables higher density interconnects with acceptable manufacturing precision, achieving improved bandwidth without requiring beyond-state-of-the-art manufacturing precision.
Data Source
AI summary
Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate including a dielectric material having a first surface and an opposing second surface, a first material on at least a portion of the second surface, and a second material on at least a portion of the first material, wherein the second material has a different material composition than the first material.