Multi-Die Flange Package Combining GaN and LDMOS Amplifier Dies

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current power amplifier packages using LDMOS technology face limitations in reducing device parasitics, making it difficult to achieve high efficiency and wide bandwidth, while GaN technology is more expensive and less linear, necessitating the integration of different semiconductor material types in the same package.

Innovation Solution

A multi-die package design where a first semiconductor die made of one material is attached to a thermally conductive flange using a first die attach material, and a second semiconductor die made of a different material is attached to the same flange using a second die attach material, with leads providing external electrical access to both dies, allowing for the combination of GaN and LDMOS dies in a Doherty amplifier package.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If GaN technology is used to reduce device parasitics and improve efficiency, then performance and efficiency are improved, but cost increases and linearity decreases

Engineering Contradiction:
Improvedevice efficiencyVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The power amplifier is divided into two separate semiconductor dies: a GaN die for the main amplifier stage (providing high efficiency and power handling) and an LDMOS die for the peaking amplifier stage (providing linearity). This segmentation allows each die to be optimized for its specific function and material characteristics, resolving the contradiction between efficiency and cost/linearity by assigning appropriate materials to appropriate functions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different semiconductor materials are used in different locations/stages of the amplifier: GaN is used where high efficiency and power handling are critical (main amplifier), while LDMOS is used where linearity is critical (peaking amplifier). This local optimization of material selection based on functional requirements resolves the contradiction by allowing each material to excel at its intended function.

Inventive Principle:
Principle #3Local quality

2Ease of operation

If LDMOS technology is used, then linearity is maintained, but device parasitics cannot be reduced sufficiently to achieve high efficiency and wide bandwidth

Engineering Contradiction:
Improvesignal linearityVSAvoiddevice efficiency
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The amplifier function is segmented into two stages handled by different materials: the main amplifier stage uses GaN for high efficiency and power handling, while the peaking stage uses LDMOS for linearity. This segmentation allows LDMOS to maintain its linearity advantage while GaN compensates for the efficiency limitations of single-material designs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges two different semiconductor technologies (GaN and LDMOS) into a single multi-die package, combining their complementary strengths. The GaN die provides high efficiency and power handling capability, while the LDMOS die provides linearity, creating a hybrid solution that achieves both high efficiency and good linearity that neither material could achieve alone.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If different semiconductor material types are integrated in the same package, then performance advantages of each material can be leveraged, but manufacturing complexity increases

Engineering Contradiction:
Improveoverall package performanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The package is segmented into separate dies for different materials, allowing each die to be manufactured using optimized processes for its specific material system. This segmentation simplifies the overall manufacturing challenge by avoiding the need for complex heteroepitaxial growth or integration, instead using separate fabrication processes followed by package-level integration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses an intermediary approach by integrating the different material dies at the package level rather than attempting monolithic integration. Each die is fabricated separately using material-appropriate processes, then brought together in a multi-die package with appropriate interconnections, using the package structure as an intermediary that reconciles the incompatibilities of different material systems.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables a lower-cost, more efficient power amplifier package that leverages the performance advantages of GaN while maintaining linearity, as the LDMOS die provides sufficient linearity and the GaN die offers higher performance, effectively addressing the limitations of single-material solutions.

Implementation Method 1

a thermally conductive flange, a first semiconductor die made of a first semiconductor material attached to the thermally conductive flange

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS12080660B2Package with different types of semiconductor dies attached to a flange
Publication Date: 2024.09.03 MACOM TECH SOLUTIONS HLDG INC
  • US12080660B2 patent drawing
  • US12080660B2 patent drawing
  • US12080660B2 patent drawing

AI summary

A multi-die package includes a thermally conductive flange, a first semiconductor die made of a first semiconductor material attached to the thermally conductive flange via a first die attach material, a second semiconductor die attached to the same thermally conductive flange as the first semiconductor die via a second die attach material, and leads attached to the thermally conductive flange or to an insulating member secured to the flange. The leads are configured to provide external electrical access to the first and second semiconductor dies. The second semiconductor die is made of a second semiconductor material different than the first semiconductor material. Additional multi-die package embodiments are described.