Multi-Die Interconnect Protocol Interface Synchronization

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Solution Overview

Problem

Multi-die interconnects in integrated circuit devices typically operate as narrow, independent, and asynchronous channels, leading to data skew and inefficiencies in supporting wide-protocol bus interfaces, where parallel data bits need to be divided and redistributed across channels.

Innovation Solution

The method involves splitting data signals into multiple streams, establishing a handshake signal to synchronize channels, and using FIFOs with varying speed-up and slow-down rates to compress data streams, reducing skew and minimizing the number of required pins by bonding channels with shared synchronization signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If multiple independent asynchronous channels are used for multi-die interconnect, then channel independence and simplicity are improved, but data skew and synchronization difficulty worsen

Engineering Contradiction:
Improvechannel independenceVSAvoiddata skew
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent bonds multiple independent channels together to form a unified wide-protocol bus interface. By merging the functionality of multiple narrow channels into a single logical interface, the system achieves both channel independence (each channel remains physically separate) and reduced data skew (synchronization signals are shared across bonded channels), resolving the technical contradiction between simplicity and reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The bonded channel interface serves multiple functions: it maintains the independence of individual channels for simple implementation while simultaneously providing synchronized data transmission across the wide-protocol bus. The shared synchronization mechanism enables universal operation across all bonded channels, allowing them to function as a unified interface while retaining their individual characteristics.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Quantity of substance

If parallel data bits are divided and redistributed across multiple narrow channels, then pin count is reduced, but data skew and transmission complexity increase

Engineering Contradiction:
Improvepin countVSAvoiddata skew
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The wide-protocol bus interface is segmented into multiple narrow channels, each carrying a portion of the parallel data bits. This segmentation reduces the pin count requirement while maintaining the functionality of the wide interface. The segmentation is achieved by dividing the data bus into separate channels that can be transmitted independently across the multi-die interconnect.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple segmented channels are merged back together at the receiving end to reconstruct the wide-protocol bus interface. This merging process, combined with shared synchronization signals, ensures that data from different channels is properly aligned, reducing data skew while achieving pin count reduction through the intermediate segmentation step.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If asynchronous FIFOs are used to drive independent channels, then channel independence is maintained, but skew introduction and synchronization difficulty worsen

Engineering Contradiction:
Improvechannel independenceVSAvoidskew
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent merges the synchronization mechanisms of multiple asynchronous FIFOs by introducing shared synchronization signals that are common to all bonded channels. This allows the FIFOs to operate independently (maintaining channel independence) while being coordinated by shared timing references, thereby reducing the skew that would otherwise accumulate from completely independent asynchronous operations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Shared synchronization signals act as intermediaries between the independent asynchronous FIFOs. These intermediary signals provide a common timing reference that coordinates the operation of multiple FIFOs without requiring them to be fully synchronized, thus maintaining channel independence while reducing skew through the mediating synchronization mechanism.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12147377B2Distributed multi-die protocol application interface
Publication Date: 2024.11.19 ALTERA CORP
  • US12147377B2 patent drawing
  • US12147377B2 patent drawing
  • US12147377B2 patent drawing

AI summary

Systems and methods are provided for supporting wide-protocol interface across a multi-die interconnect interface. Data signals of a wide-protocol interface are split into a plurality of data streams. A handshake signal is established between a first circuit and a second circuit, whereby the first circuit and second circuit are dies of a multi-die device. The first circuit transmits the plurality of data streams to the second circuit via a plurality of multi-die interconnect channels. Each data stream of the plurality of data streams are compressed based on the handshake signal in order to provide wide-protocol interface with reduced number of required pins.