Multi-die IC with Interposer for Heterogeneous Process Integration
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Solution Overview
Problem
Current integrated circuits (ICs) face limitations in flexibility and efficiency due to monolithic, single-die architectures, which restrict the use of different process technologies and power/clock domains within a single package, leading to reduced performance and increased complexity.
Innovation Solution
A multi-die IC architecture is introduced, featuring an interposer and multiple dies with a data processing engine (DPE) array, where each die can operate independently in different power and clock domains, and communicate through standardized interfaces, allowing for flexible integration of dies with varying process technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single-die architecture is used, then the structure is simple and homogeneous, but flexibility and adaptability are reduced due to inability to use different process technologies
Solution Approach 1:
The patent divides the integrated circuit into multiple separate dies, each capable of being fabricated using different process technologies. These dies are then interconnected through an interposer to form a multi-die IC package, enabling flexibility while managing complexity through modular segmentation
Solution Approach 2:
The patent introduces an interposer as an intermediary component that facilitates communication and interconnection between multiple dies with different process technologies. The interposer provides standardized interfaces and routing, enabling heterogeneous dies to work together without direct complex interconnections
2Use of energy by moving object
If a single-die architecture is used, then manufacturing is simpler, but power and clock domain management becomes more complex
Solution Approach 1:
The patent segments the power and clock domain management into separate controllable units for each die. Each die can be independently powered and clocked, allowing selective activation of only the required dies based on operational needs, thereby improving power efficiency while distributing management complexity across multiple independent units
3Adaptability or versatility
If different process technologies are integrated in a single die, then versatility improves, but manufacturing precision and reliability decrease
Solution Approach 1:
The patent separates dies fabricated with different process technologies into distinct physical units, each optimized for its specific process node. These heterogeneous dies are then integrated at the package level through the interposer, avoiding the manufacturing precision issues that would arise from attempting to fabricate mixed-process circuits on a single die
Solution Approach 2:
The patent transitions from horizontal integration (mixing different process technologies on the same die plane) to vertical integration (stacking multiple dies with different processes in a 3D package configuration). This dimensional change allows each die to maintain its optimal process characteristics while achieving overall system versatility
Data Source
AI summary
An integrated circuit includes an interposer and a die coupled to the interposer. The die includes a first data processing engine (DPE) array and a second DPE array. The first DPE array includes a first plurality of DPEs and a first DPE interface coupled to the first plurality of DPEs. The second DPE array includes a second plurality of DPEs and a second DPE interface coupled to the second plurality of DPEs. The integrated circuit includes one or more other dies having a first die interface coupled to, and configured to communicate with, the first DPE interface via the interposer and a second die interface coupled to, and configured to communicate with, the second DPE interface via the interposer.