Multi-Die IC Integration via Interposer Substrate
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The manufacturing of mixed-signal integrated circuit (IC) devices faces challenges due to the need for different process nodes for digital and analog circuitry, leading to higher costs and inefficiencies as both types of circuitry are fabricated using the same process node, resulting in either underoptimized or overoptimized components.
Innovation Solution
The method involves fabricating digital and analog circuitry on separate IC wafers using optimized process nodes and combining them on an interposer substrate to form a composite IC wafer, which is then diced into individual IC devices, allowing for the use of different process nodes for each type of circuitry and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If both digital and analog circuitry are fabricated using the same process node, then manufacturing simplicity is maintained, but manufacturing cost increases and performance optimization deteriorates
Solution Approach 1:
The patent segments the mixed-signal IC into separate digital and analog portions that are fabricated on different wafers using different process nodes. The digital portion is fabricated on a first wafer using a first process node, while the analog portion is fabricated on a second wafer using a second process node. This segmentation allows each portion to be optimized for its specific requirements, resolving the contradiction between manufacturing simplicity and cost efficiency.
Solution Approach 2:
The patent introduces an interposer substrate as an intermediary component that couples the digital and analog portions together. The interposer substrate includes bond pads that electrically connect the digital portion from the first wafer to the analog portion from the second wafer. This intermediary enables the integration of differently-fabricated components, allowing optimization of both digital and analog circuitry while maintaining overall system functionality.
2Manufacturing precision
If analog circuitry is fabricated using a smaller process node, then manufacturing precision improves, but manufacturing cost increases significantly
Solution Approach 1:
The patent applies local quality by fabricating the analog portion using a first process node optimized for analog circuitry requirements, while the digital portion is fabricated using a second process node optimized for digital logic. This allows each portion to have the appropriate manufacturing precision and cost characteristics for its specific function, rather than forcing both to use the same (more expensive) process node.
3Productivity
If digital circuitry is fabricated using a larger process node, then manufacturing cost decreases, but device performance deteriorates
Solution Approach 1:
The patent applies local quality by fabricating the digital portion using a second process node optimized for digital logic performance, while the analog portion is fabricated using a first process node. This ensures that the digital circuitry achieves the necessary performance characteristics without being constrained by analog fabrication requirements, resolving the contradiction between cost and performance.
Data Source
AI summary
A method for manufacturing an integrated circuit (IC) device. A first IC wafer is diced to obtain a first superdie including a plurality of first die. A second IC wafer is diced to obtain a second superdie including a plurality of second die. The first superdie and the second superdie are placed on an interposer substrate to form at least part of a composite IC wafer, wherein each of the first die is aligned with a respective one of the second die in the composite IC wafer. The composite IC wafer is diced to obtain a plurality of IC devices, where each of the IC devices includes a respective one of the first die and the second die with which it is aligned.