Multi-Die Memory Data Prefetching for Lower Transfer Latency
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Solution Overview
Problem
Concurrent performance of host write operations and data transfer operations in memory systems results in reduced data rate and increased latency due to timing differences between programming data to higher and lower-density memory blocks.
Innovation Solution
A memory system pre-fetches subsets of data from both dies before initiating programming operations, allowing parallel execution of host write and data transfer operations, thereby improving data rate and latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data transfer operation and host write operation are performed concurrently without pre-fetching, then device complexity is reduced, but productivity decreases due to reduced data rate and increased latency
Solution Approach 1:
The system pre-fetches subsets of data from both dies before initiating programming operations. This preliminary action allows the data to be ready in advance, enabling concurrent execution of host write and data transfer operations without waiting for data preparation, thereby improving data rate while managing complexity through structured pre-processing
2Loss of time
If data transfer operation and host write operation are performed concurrently without pre-fetching, then device complexity is reduced, but loss of time increases due to increased latency
Solution Approach 1:
By pre-fetching data subsets before programming operations initiate, the system eliminates waiting time during concurrent operations. The data is prepared in advance in a structured manner, allowing immediate processing when the operation starts, thus reducing latency without creating unmanageable complexity
3Productivity
If data is transferred between higher and lower-density memory blocks sequentially, then manufacturing precision is maintained, but productivity decreases due to reduced data rate
Solution Approach 1:
The system divides data into subsets and transfers them between memory blocks in a structured sequence. Each subset is handled with precise timing control appropriate for the target density, maintaining manufacturing precision while enabling parallel processing of multiple subsets to improve overall data transfer efficiency
Solution Approach 2:
Data subsets are pre-fetches and prepared before the actual programming operation to the target density block. This preliminary preparation allows the system to initiate concurrent operations with proper timing, achieving both high productivity and precise programming by having data ready in advance for each segmented transfer
Data Source
AI summary
Methods, systems, and devices for techniques for transferring data between memory devices are described. A memory system may pre-fetch one or more subsets of data associated with the data transfer operation from a first die of the memory system and a second die of the memory system prior to initiating a programming operation on either die. For example, to perform a data folding operation for a set of data which includes a first subset of data stored to the first die and a second subset of data stored to the second die, the memory system may retrieve both the first subset from the first die and the second subset from the second die prior to performing a programming operation on either die.