Multi-Die Network-on-Chip Layout for Programmable Logic Fabric

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Solution Overview

Problem

In multi-dimensional die systems, programmable logic devices face challenges in incorporating a network-on-chip (NOC) due to limited space on the fabric die, which affects performance and connectivity, making it difficult to facilitate data communication between sectors and across different fabric dies.

Innovation Solution

The implementation of a network-on-chip (NOC) on a separate die that includes fabric support circuitry, allowing data communication between sectors and dies, while maintaining the programmable logic fabric entirely on one die, thus resolving bandwidth issues and enabling faster configuration and reconfiguration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a network-on-chip (NOC) is incorporated on the fabric die, then data communication between sectors is improved, but the limited space on the fabric die causes device complexity and manufacturing difficulties

Engineering Contradiction:

Improvedata communication capabilityVSAvoidfabric die structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the system into separate functional components: the fabric die contains only programmable logic fabric, while a separate base die contains the NOC circuitry. This segmentation resolves the space constraint by distributing components across multiple dies, allowing each die to be optimized for its specific function without overcrowding.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary connection mechanism (interface circuitry and communication pathways) between the fabric die and base die that enables data communication without requiring direct integration of NOC on the fabric die. This intermediary approach allows the fabric die to maintain simplicity while still achieving communication capability through the separate base die.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If NOC circuitry is integrated on the fabric die, then connectivity between sectors is improved, but bandwidth limitations and performance issues occur

Engineering Contradiction:

Improveconnectivity between sectorsVSAvoiddata communication bandwidth

Core Design Contradiction:

Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent transitions from a two-dimensional integration approach (integrating NOC on the same fabric die) to a three-dimensional stacked die architecture. By placing the base die with NOC underneath the fabric die and using vertical interconnects, the system achieves higher bandwidth and connectivity without constraining the fabric die's horizontal space.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Reliability

If the fabric die space is allocated for NOC, then communication pathways are provided, but the programmable logic fabric area is reduced

Engineering Contradiction:

Improvecommunication infrastructureVSAvoidprogrammable logic fabric area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts the NOC circuitry from the fabric die and relocates it to a separate base die. This extraction allows the fabric die to be dedicated entirely to programmable logic fabric, maximizing the fabric area while the NOC functionality is preserved on the base die with appropriate interface connections.

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS12063037B2Embedded network on chip accessible to programmable logic fabric of programmable logic device in multi-dimensional die systems

Publication Date: 2024.08.13 ALTERA CORP

AI summary

An integrated circuit device may include programmable logic fabric disposed on a first integrated circuit die, such that the programmable logic fabric may include a first region of programmable logic fabric and a second region of programmable logic fabric. The first region of programmable logic fabric is configured to be programmed with a circuit design that operates on a first set of data. The integrated circuit may also include network on chip (NOC) circuitry disposed on a second integrated circuit die, such that the NOC circuitry is configured to communicate data between the first integrated circuit die and the second integrated circuit die.