Multi-Die Package Insulation Structure for Higher Withstand Voltage
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Solution Overview
Problem
Semiconductor devices with multiple elements in a single package face challenges in maintaining insulation withstand voltage due to differences in power supply voltages between conduction paths, leading to potential electrical insulation failures.
Innovation Solution
A semiconductor device design featuring conductive support members with distinct die pads and insulating elements, where the die pads have specific geometries and orientations to enhance insulation, and a sealing resin that covers and insulates the components, effectively managing the voltage differences and reducing electric field strengths.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple semiconductor elements are mounted in one package with different power supply voltages, then integration density is improved, but insulation withstand voltage between conduction paths deteriorates
Solution Approach 1:
The die pad is designed with non-uniform thickness, creating locally thicker regions at specific positions. This local quality enhancement provides increased insulation capacity exactly where voltage differences between conduction paths are most critical, while maintaining overall package integration density.
Solution Approach 2:
The insulation structure extends from a two-dimensional planar configuration into the third dimension by creating a protrusion that rises above the insulating element surface. This vertical extension increases the creepage distance and insulation withstand voltage without occupying additional planar space, thus maintaining integration density.
2Area of stationary object
If die pads are positioned closer together to reduce package size, then package area is reduced, but electric field strength between die pads increases
Solution Approach 1:
An insulating element with a protrusion structure is introduced as an intermediary between the first and second die pads. This mediator increases the creepage distance and reduces electric field strength by providing a longer, more gradual insulation path, allowing die pads to be positioned closer together without increasing electric field stress.
Solution Approach 2:
The protrusion of the insulating element creates a curved, rounded transition region between die pads rather than a sharp angular boundary. This curved geometry distributes the electric field more evenly, reducing peak field strength and preventing field concentration at sharp corners.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design significantly improves insulation withstand voltage between circuits, enhancing the reliability and durability of semiconductor devices in applications like electric vehicles and hybrid vehicles by effectively managing voltage differences and reducing electric field strengths.
Implementation Method 1
a sealing resin that covers the first die pad, the second die pad, the first semiconductor element, the second semiconductor element, and the insulating element and insulates the first die pad and the second die pad from each other
Implementation Method 2
an insulating element that conducts to the first semiconductor element and the second semiconductor element and insulates the first circuit and the second circuit from each other
Data Source
AI summary
A semiconductor device includes a first die pad, a second die pad, a first semiconductor element, a second semiconductor element, an insulating element, first terminals, second terminals, and a sealing resin. The sealing resin has a top surface, a bottom surface, and a first side surface connected to the top surface and the bottom surface. The first side surface includes a first region connected to the top surface, a second region connected to the bottom surface, and a third region connected to the first region and the second region, the plurality of first terminals being exposed to the third region. A surface roughness of each of the top surface, the bottom surface, the first region, and the second region is larger than a surface roughness of the third region.