Multi-Die Package Integration via UV Release Film
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Solution Overview
Problem
Current solutions for connecting multiple independent semiconductor die packages into a single socket result in warpage, lower yield, higher cost, and thermal reliability issues due to the need for larger packages.
Innovation Solution
A process that combines multiple independent die packages into a single molded package using a carrier wafer with an ultraviolet release film, overmolding, planarization, and singulation, allowing for customizable configurations that match specific socket designs, including various array configurations and different computer application functions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple independent semiconductor die packages are connected within a single socket using current solutions, then the application requirement for multiple dies is met, but warpage, lower yield, higher cost, and thermal reliability issues occur
Solution Approach 1:
The patent merges multiple independent semiconductor die packages into a single integrated package structure that fits within one socket. The package substrate integrates multiple die mounting areas, allowing multiple independent dies to be mounted and interconnected on a single substrate, thereby achieving multi-die functionality while maintaining socket compatibility and improving thermal/mechanical reliability through unified packaging
Solution Approach 2:
The patent implements a nested structure where multiple semiconductor dies are mounted on a package substrate, which itself is mounted on a carrier substrate. This hierarchical nesting allows multiple independent die packages to be contained within a single package assembly that fits in one socket, achieving the desired adaptability while maintaining structural integrity and reliability
2Adaptability or versatility
If larger packages with multiple dies are built, then multiple die functionality is achieved, but warpage, lower yield, higher cost, and thermal issues result
Solution Approach 1:
The patent segments the packaging function across multiple levels: individual semiconductor dies are mounted on a package substrate, which is then mounted on a carrier substrate. This segmentation allows each die to be manufactured and tested independently, maintaining high manufacturing yield, while the modular package structure enables multi-die functionality without requiring a single large complex package that would be difficult and expensive to manufacture
3Adaptability or versatility
If multiple independent die packages are used, then customized semiconductor die packages are achieved, but warpage and thermal reliability issues occur
Solution Approach 1:
The patent combines multiple independent die packages onto a single package substrate with a unified thermal management structure. The single substrate provides a common thermal pathway and mechanical support for all mounted dies, distributing thermal loads evenly and preventing the warpage that occurs when multiple separate packages are stacked or connected, while still allowing customized die configurations and functions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient, cost-effective, and reliable integration of multiple die packages into a single socket, reducing warpage and yield issues while accommodating diverse configurations and functions, enhancing thermal and mechanical reliability.
Implementation Method 1
a carrier wafer with an ultraviolet release film
Data Source
AI summary
Processes for configuring a plurality of independent die packages for socketing. The packages are attached to a carrier wafer with a release film. The attached plurality of independent die packages are overmolded to provide a molded multi-die package. The molded multi-die package is planarized to expose the dies, singulated, and released from the carrier wafer. The singulated, molded multi-die packaging may be picked for further processing and placed into a socket. A plurality of molded, multi-die packages may be placed in a socket and operate as a computer system. The independent die packages may each perform and same computer application function or different computer application functions, and may have the same or different dimensions. The socket may have any of a number of configurations as may be needed.


