Multi-Die Power Module Layout for Hot Spot Thermal Control
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Solution Overview
Problem
Semiconductor power devices face challenges with thermal instability, non-uniform turn-on voltage, and hot spots, leading to reduced long-term reliability, increased costs, and compromised thermal and electrical performance.
Innovation Solution
The configuration of semiconductor power devices into multiple high-aspect-ratio semiconductor dies on a substrate, optimized for thermal performance, reduces maximum operating temperature and improves heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a semiconductor power device uses a smaller number of large-die-size semiconductor devices for integration, then engineering and economic advantages are improved, but thermal performance deteriorates due to hot spots at the geometric center
Solution Approach 1:
The patent divides a single large semiconductor die into multiple smaller semiconductor dies, each with its own separate active area. This segmentation eliminates the hot spot problem at the geometric center of large dies while maintaining integration benefits, as each smaller die has improved thermal characteristics and can be independently managed on the substrate.
2Productivity
If a semiconductor power device increases packing density, then integration is improved, but thermal performance deteriorates due to hot spot temperature increase
Solution Approach 1:
By segmenting the device into multiple smaller dies with high aspect ratios, the patent achieves high packing density on the substrate while each individual die maintains favorable thermal characteristics. The segmented approach allows efficient space utilization without creating hot spots, as heat dissipation paths are optimized for each smaller die structure.
Solution Approach 2:
The patent transitions from a single-plane large die configuration to a multi-die arrangement on the substrate, utilizing spatial distribution across the substrate surface. This dimensional reorganization allows high packing density while maintaining thermal performance through optimized heat dissipation geometry for each smaller die.
3Ease of manufacture
If a semiconductor power device uses multiple tubs with lower packing density, then manufacturing is improved, but thermal performance deteriorates due to cross-heating between tubs
Solution Approach 1:
The patent segments the device into multiple independent semiconductor dies, where each die contains active areas that are thermally isolated from other dies by the substrate. This eliminates cross-heating between tubs while maintaining manufacturing simplicity, as each die can be processed and mounted independently on the substrate with optimized thermal pathways.
4Ease of manufacture
If a semiconductor power device increases inactive areas between tubs, then manufacturing is improved, but device area increases thus decreasing per-wafer yields
Solution Approach 1:
By segmenting the device into multiple smaller dies, the patent eliminates the need for extensive inactive areas between tubs within a single die. Each smaller die requires minimal inactive areas, maximizing the active area ratio and improving per-wafer yields while maintaining manufacturing simplicity through standardized die structures.
Solution Approach 2:
The patent moves from a single-die configuration requiring large inactive areas to a multi-die configuration where inactive areas are minimized within each die. The substrate provides the separation function, allowing compact die layouts that maximize wafer utilization and reduce total semiconductor area while maintaining manufacturability.
5Temperature
If techniques are used to improve thermal performance, then thermal management is improved, but electrical performance deteriorates due to increased parasitic inductances
Solution Approach 1:
The patent segments the semiconductor device into multiple smaller dies, each with optimized geometry that inherently improves thermal performance without requiring additional thermal management structures. This segmentation achieves thermal management goals while maintaining low parasitic inductances, as the compact die structures and direct substrate mounting preserve electrical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances temperature uniformity, improves long-term reliability, reduces semiconductor real estate requirements, and enhances both thermal and electrical performance of semiconductor power devices.
Implementation Method 1
The substrate may be an insulator material with respect to electric current such as beryllium oxide (BO), aluminum nitride (AlN), or silicon nitride (Si3N4)
Data Source
AI summary
An electronic module performing a power function comprises a substrate and a plurality of semiconductor dies disposed on the substrate. The plurality of semiconductor dies operates together to perform a power device function. The semiconductor dies may be identical. The semiconductor die may have a high length-to-width (i.e. aspect) ratio in order to improve the thermal performance of the electronic module. The semiconductor die may be disposed on the substrate in a uniformly spaced pattern to improve the thermal performance, which pattern may be a hexagonal pattern, a linear pattern, or a rectangular pattern. The electronic module may also comprise a driver device coupled to and configured to control the plurality of semiconductor dies. The driver device may be disposed on the substrate between a first semiconductor die of the plurality of semiconductor dies and a second semiconductor die of the plurality of semiconductor dies.


