Multi-Die Redistribution Layer Packaging for Dense Die Stacking

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Solution Overview

Problem

The semiconductor industry faces challenges in miniaturization and packaging of semiconductor devices, particularly in achieving high-speed, low-power, and high-bandwidth integration, where traditional packaging methods are inefficient and costly, and there is a need for innovative techniques to stack and connect logic and memory dies effectively.

Innovation Solution

The proposed solution involves a package structure with stacked memory dies in a face-to-face connection with logic dies through a redistribution layer, utilizing u-bump flip chip and metal-metal or polymer-polymer hybrid bonding, along with multiple layers of fan-out technology, to enable high-density and reliable connections, and includes a heat dissipation lid for thermal management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional packaging methods are used, then manufacturing simplicity is maintained, but integration density and connection reliability deteriorate

Engineering Contradiction:
Improveconnection reliabilityVSAvoidpackaging structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent transitions from traditional two-dimensional planar packaging to three-dimensional stacked packaging, where multiple dies are vertically stacked and connected through redistribution layers. This dimensional change enables higher integration density and improved connection reliability by reducing signal path lengths and enabling direct vertical interconnections between logic and memory dies.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where multiple redistribution layers are embedded within molding material layers, and multiple dies are stacked within a single package footprint. Each redistribution layer is surrounded by molding material, creating a nested configuration that protects interconnections while enabling high-density integration.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Quantity of substance

If feature size is reduced to increase integration density, then component capacity improves, but manufacturing precision and connection reliability worsen

Engineering Contradiction:
Improveintegration densityVSAvoidconnection reliability
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

By moving to three-dimensional stacking, the patent achieves higher integration density without further reducing feature sizes. Multiple dies are stacked vertically, effectively multiplying the functional capacity within the same footprint while maintaining larger, more manufacturable feature dimensions on each individual die.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Redistribution layers serve as intermediary structures that provide robust electrical connections between stacked dies. These layers are formed with larger feature sizes that are easier to manufacture with high precision, and they act as mediators that distribute and re-route signals between the fine-pitch die bonds and coarser external packaging connections.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Volume of moving object

If multiple dies are stacked to reduce form factor, then device size is reduced, but connection reliability and thermal management become more difficult

Engineering Contradiction:
Improvedevice form factorVSAvoidconnection reliability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

Multiple dies are nested vertically within a compact package, with each die surrounded by molding material and interconnected through embedded redistribution layers. This nested arrangement achieves high integration density in a small volume while protecting all interconnections within the molded enclosure, enhancing both reliability and thermal management.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The molding material acts as an intermediary that provides mechanical support, environmental protection, and thermal conduction pathways. It surrounds and protects the fragile interconnections between stacked dies while conducting heat away from the active devices, thus improving both connection reliability and thermal management in the compact stacked configuration.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If complex bonding techniques are used to achieve high-density connections, then connection reliability improves, but manufacturing complexity and cost increase

Engineering Contradiction:
Improveconnection reliabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines multiple functions into unified structures: redistribution layers serve both as electrical interconnects and as structural support elements; molding material simultaneously provides mechanical protection, environmental sealing, and thermal conduction. This merging reduces the number of separate manufacturing steps and materials required, lowering cost while maintaining high connection reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The redistribution layers are designed to perform multiple functions: electrical connection, mechanical support, and stress distribution. The molding material serves multiple purposes: protection, thermal management, and structural integrity. This multi-functionality reduces overall manufacturing complexity compared to using separate specialized components for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12199065B2Multi-die package structures including redistribution layers
Publication Date: 2025.01.14 PARABELLUM STRATEGIC OPPORTUNITIES FUND LLC
  • US12199065B2 patent drawing
  • US12199065B2 patent drawing
  • US12199065B2 patent drawing

AI summary

A semiconductor device and a method of making the same are provided. A first die and a second die are placed over a carrier substrate. A first molding material is formed adjacent to the first die and the second die. A first redistribution layer is formed overlying the first molding material. A through via is formed over the first redistribution layer. A package component is on the first redistribution layer next to the copper pillar. The package component includes a second redistribution layer. The package component is positioned so that it overlies both the first die and the second die in part. A second molding material is formed adjacent to the package component and the first copper pillar. A third redistribution layer is formed overlying the second molding material. The second redistribution layer is placed on a substrate and bonded to the substrate.