Multi-Die Interface Using Serial Links for Asynchronous Signals
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Solution Overview
Problem
When integrated circuit devices are separated into multiple die, it becomes difficult to maintain the same level of asynchronous signal communication as in a monolithic interface due to the limited number of available wires, making it infeasible to connect each asynchronous signal across a unique interconnect wire.
Innovation Solution
A seemingly monolithic interface is created between separate integrated circuit die by sampling signals based on latency specifications, allowing asynchronous signals to be communicated synchronously and serially, preserving the appearance of asynchronicity while efficiently transmitting signals over a limited number of connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate integrated circuit die are used, then different components can be fabricated using different lithography techniques and development schedules, but the number of available interconnect wires is reduced making it difficult to communicate a large number of asynchronous signals
Solution Approach 1:
The interface is segmented into two separate die, allowing different components to be fabricated using different lithography techniques and development schedules. This segmentation enables independent optimization of each die while maintaining overall system functionality.
Solution Approach 2:
The patent transitions from a parallel communication approach (multiple wires for multiple signals) to a serial communication approach (single wire for multiple signals over time). This dimensional change from spatial multiplexing to temporal multiplexing allows the same physical wire to carry multiple asynchronous signals sequentially, effectively increasing the capacity of the interconnect without adding more physical wires.
2Quantity of substance
If a monolithic interface is used, then a large number of asynchronous signals can be communicated over parallel wires, but the components cannot be developed independently with different fabrication techniques
Solution Approach 1:
The monolithic interface is segmented into separate die, enabling independent development and fabrication of different components using appropriate lithography techniques for each component type while maintaining the ability to communicate multiple asynchronous signals.
Solution Approach 2:
The patent implements periodic sampling of asynchronous signals at defined sampling points, creating a structured communication rhythm that allows multiple asynchronous signals to be transmitted serially over a single wire. This periodic action enables time-division multiplexing, where each signal is sampled and transmitted in sequence, preserving signal integrity while reducing wire requirements.
3Quantity of substance
If asynchronous signals are transmitted serially over a single wire, then wire availability is reduced to a minimum, but the communication capacity for multiple signals must be maintained
Solution Approach 1:
Asynchronous signals are sampled periodically at defined sampling points during specific time intervals. This periodic sampling allows multiple signals to be captured and transmitted sequentially over a single wire without losing information, as each signal is sampled at an appropriate moment within its time interval.
Solution Approach 2:
The patent introduces sampling points and time interval definitions as intermediaries between the asynchronous signal sources and the serial transmission medium. These intermediaries structure the asynchronous signals into a format suitable for serial transmission, preserving the original signal information while enabling efficient use of the single wire connection.
Data Source
AI summary
A seemingly monolithic interface between separate integrated circuit die may appear to be parallel or asynchronous from the perspective of the separate integrated circuit die. The signals of the seemingly monolithic interface, however, may actually be communicated between the separate die via serial and/or synchronous communication. In one method, a number of signals stored in a first parallel interface on a first integrated circuit die may be sampled. In some cases, at least one of the signals may be sampled more often than another one of the signals. A serial signal may be generated based on sampled signals. The serial signal may be transmitted to a corresponding second parallel interface on the second integrated circuit die.