Multi-Die Switching Chip Layout With Rotationally Symmetrical Dice

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing demand for larger quantities of switching ports and larger silicon areas in switching chips poses a challenge for implementing switching chips with multiple dice, as existing methods struggle to efficiently connect and manage traffic between multiple dice.

Innovation Solution

A switching chip design incorporating multiple dice that are rotationally symmetrical, connected through buses configured as row and column buses, allowing for efficient traffic transmission and reducing the burden on individual dice, enabling one-time tape-out of identical die structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the switching chip includes two or more dice to increase switching ports and silicon area, then the switching capacity and port quantity are improved, but the complexity of connecting and managing traffic between multiple dice increases

Engineering Contradiction:
Improveswitching ports quantityVSAvoidconnection complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The switching chip is divided into multiple dice, each die being a complete and functional switching unit. This segmentation allows the system to achieve larger switching capacity by combining multiple independent units, while each unit maintains full functionality on its own.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each die is designed as a universal unit that can function independently and also work in conjunction with other identical dice. The rotationally symmetrical design ensures that each die has the same structure and capabilities, making them interchangeable and simplifying the connection architecture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Power

If the switching chip includes two or more dice to increase switching capacity, then the bandwidth is improved, but the difficulty of implementing and managing multiple dice increases

Engineering Contradiction:
Improveswitching bandwidthVSAvoidimplementation difficulty
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

While the dice themselves are symmetrical, their arrangement and connection patterns utilize asymmetry in the bus configuration. The row buses and column buses create a structured asymmetric connection pattern that simplifies traffic management between dice.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

Row buses and column buses serve as intermediary connection structures between dice. These buses act as mediators that simplify the direct point-to-point connections that would otherwise be required between all pairs of dice, reducing implementation complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If identical die structures are used to enable one-time tape-out, then manufacturing cost is reduced, but the ability to optimize for specific positions in the chip is limited

Engineering Contradiction:
Improvetape-out costVSAvoidposition-specific optimization
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

Each die is designed as a universal unit with identical structure and full functionality. This universality enables one-time tape-out for all dice, significantly reducing manufacturing costs while maintaining the ability to achieve system-level optimization through the rotational symmetry and bus connection architecture.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

Multiple identical dice are merged into a single chip system through standardized bus connections. The merging of identical units creates a scalable system that achieves both cost efficiency through shared design and system-level performance through coordinated operation.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12566720B2Integrated circuit, chip, and electronic device
Publication Date: 2026.03.03 HUAWEI TECH CO LTD
  • US12566720B2 patent drawing
  • US12566720B2 patent drawing
  • US12566720B2 patent drawing

AI summary

This disclosure provides an integrated circuit, a chip, and an electronic device. The chip includes D dice, where D is a positive integer greater than or equal to 2, the D dice include a first die and a second die, and the first die and the second die are rotationally symmetrical.