Multi-die Write Management for Non-volatile Memory Systems
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Solution Overview
Problem
In non-volatile semiconductor memory systems with multiple dies connected by a memory bus, delays can occur during write operations when one or more dies become busy, affecting write speed due to the need to wait for busy dies to become ready.
Innovation Solution
A die assignment scheme that assigns data to multiple memory dies in a cyclic pattern, skipping busy dies and prohibiting immediate sequential writes to the same die, allowing for high parallelism during read and write operations by predicting which die is likely to be ready next based on elapsed time since the initiation of write operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is sent to multiple memory dies in parallel over a shared memory bus, then write speed is improved, but delays occur when one or more dies become busy and affect write speed
Solution Approach 1:
The patent implements a dynamic die selection mechanism that adapts to the real-time status of memory dies. The memory controller monitors which dies are busy and dynamically adjusts data distribution, switching from a static cyclic pattern to a dynamic selection based on current die availability. This resolves the contradiction by maintaining high write speed through parallel operations while avoiding delays by selecting only ready dies.
Solution Approach 2:
The system incorporates feedback mechanisms where the memory controller continuously monitors the status of each die (busy or ready) and uses this information to make intelligent routing decisions. The feedback loop ensures that data is sent to the next ready die rather than following a rigid cyclic pattern, thereby maintaining write speed without incurring delays from busy dies.
2Reliability
If the system waits for busy dies to become ready, then data integrity is maintained, but write speed decreases due to waiting
Solution Approach 1:
The patent implements preliminary action by having the memory controller proactively monitor die status and identify ready dies before data arrives. Instead of waiting passively for dies to become ready, the system prepares in advance by tracking which dies will be available, ensuring data integrity through proper sequencing while maintaining write speed through proactive die selection.
Solution Approach 2:
The system applies the skipping principle by bypassing busy dies and directly routing data to the next ready die. This allows the write operation to continue without waiting for busy dies, maintaining write speed while preserving data integrity through the ordered cyclic pattern that ensures all dies are eventually utilized.
3Productivity
If immediately sequential writes to the same die are allowed, then write speed is maintained, but parallelism during subsequent read operations is reduced
Solution Approach 1:
The patent implements periodic action through a cyclic die selection pattern that systematically rotates through multiple dies. This periodic cycling ensures that immediately sequential writes are distributed across different dies rather than concentrated on one die, maintaining write speed while enabling parallel read operations by ensuring data is spread across multiple dies that can be read simultaneously.
Solution Approach 2:
The system applies segmentation by dividing the write stream into segments that are distributed to different dies in a cyclic manner. This segmentation prevents immediate sequential writes to the same die, thereby maintaining write speed through parallel writes while also enabling subsequent parallel read operations by having data distributed across multiple independent dies.
4Adaptability or versatility
If a cyclic pattern is used to assign data to dies, then parallelism is maintained, but delays occur when the next die in the cyclic pattern is busy
Solution Approach 1:
The patent transforms the static cyclic pattern into a dynamic die selection mechanism. Instead of rigidly following a predetermined cyclic order, the memory controller dynamically selects the next ready die based on current status information. This maintains parallelism by utilizing multiple dies while eliminating delays by adapting to real-time die availability rather than being constrained by a fixed cyclic sequence.
Data Source
AI summary
A die assignment scheme assigns data in the order it is received, to multiple memory dies. Any busy dies are skipped until they become ready again so that the system does not wait for busy dies to become ready. Immediately sequential writes to the same die are prohibited so that reading speed is not impacted.