Multi-Domain Synchronizer for Time-Varying Phase Offset Retiming

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Solution Overview

Problem

Integrated circuit data buffers face challenges in accurately retiming command-triggered control and timing signals to align with endpoint timing domains, particularly due to time-varying phase offsets and asynchronous delays, which legacy drift-tracking approaches struggle to manage efficiently.

Innovation Solution

A traffic-dissociated latency controller within the integrated circuit device estimates and logs phase offsets independently of command streams, using a multi-cycle skip circuit and clock-phase interpolator to align control and timing signals, enabling precise retiming and compensation for endpoint propagation delays and inter-domain phase offsets without disrupting signal propagation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If legacy drift-tracking approaches are used to align control signals with endpoint timing domains, then synchronization is attempted, but time-varying phase offsets and asynchronous delays cannot be managed efficiently

Engineering Contradiction:
Improvephase offset measurement precisionVSAvoidsignal alignment efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing endpoint propagation delays in a lookup table before actual signal processing occurs. The drift-tracking engine pre-compensates for time-varying phase offsets by continuously monitoring and storing correction values, so that when control signals need retiming, the pre-computed delay values are immediately available for application, eliminating the need for real-time calculation and improving alignment efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary mechanism - the drift-tracking engine with lookup table - that mediates between the control signal source and the endpoint timing domain. This intermediary continuously tracks phase offsets and stores compensation values, acting as a buffer that decouples the asynchronous timing domains and enables efficient signal alignment without direct real-time intervention.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If retiming circuits are added to manage time-varying phase offsets, then synchronization accuracy improves, but device complexity increases

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoidretiming circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies copying by creating a replica or model of the timing domain relationships through the drift-tracking engine. Instead of complex real-time retiming circuits, the system copies the essential timing characteristics into a lookup table structure, which can be queried and applied more simply. The multi-cycle skip circuit also uses copying by replicating clock phases at different time offsets, enabling retiming through selection rather than complex generation.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent applies dynamics by making the retiming system adaptive rather than static. The drift-tracking engine dynamically updates the lookup table with current phase offset measurements, allowing the system to adapt to time-varying conditions. The multi-cycle skip circuit dynamically selects different clock phases based on the required retiming amount, providing flexible and reliable synchronization without fixed complex circuitry.

Inventive Principle:
Principle #15Dynamics

3Measurement precision

If multi-cycle skip circuit and clock-phase interpolator are used for precise retiming, then signal alignment precision improves, but power consumption increases

Engineering Contradiction:
Improvesignal retiming precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by using a multi-cycle skip circuit that operates on periodic clock phases rather than continuous retiming. The clock-phase interpolator generates phases at regular intervals corresponding to different time offsets, and the system periodically selects and applies the appropriate phase based on the lookup table. This periodic operation reduces power consumption compared to continuous active retiming while maintaining precision when needed.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies partial action by using the clock-phase interpolator only when precise retiming is required, rather than continuously. The system can operate in modes where full precision is not needed, using simpler retiming paths. The lookup table approach also allows partial compensation - applying only the necessary delay correction from pre-computed values rather than full real-time processing, reducing power while maintaining adequate precision.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11677391B1Low-power multi-domain synchronizer
Publication Date: 2023.06.13 RAMBUS INC
  • US11677391B1 patent drawing
  • US11677391B1 patent drawing
  • US11677391B1 patent drawing

AI summary

A latency controller within an integrated circuit device retimes command-stream-triggered control and timing signals into endpoint timing domains having respective time-varying phase offsets relative to a reference clock by iteratively estimating and logging the phase offsets independently of commands streaming into the integrated circuit device.