Multi-domain Sensor Processing Architecture for Autonomous Driving
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Solution Overview
Problem
Autonomous driving systems require high-computation capabilities to process multiple sensor inputs efficiently, especially for low-light and high dynamic range conditions, and to detect small objects at distances over 100 meters, exceeding the processing demands of current smart phones by over a thousand times.
Innovation Solution
A multi-domain processing architecture with a multi-tier network and multi-level memory system, incorporating a multi-port DDR controller for different access speeds and memory formats, and utilizing domain-specific processors and memories to integrate disparate data formats for mutual sharing, supporting inline and store-n-forward processing of sensor streams.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple high-resolution sensors are used to improve detection capability, then measurement precision is improved, but data processing complexity increases
Solution Approach 1:
The system divides the data processing task into multiple domains (first domain, second domain, third domain) with specialized processors. Each domain handles specific sensor inputs or processing functions, segmenting the overall complex processing task into manageable specialized units that can operate in parallel.
Solution Approach 2:
The patent introduces a multi-dimensional memory hierarchy (first memory, second memory, third memory with different formats and access speeds) and multi-domain architectural dimension to handle data processing. This adds spatial and organizational dimensions to the processing system, allowing simultaneous handling of multiple data formats and processing requirements.
2Adaptability or versatility
If multiple sensors with different data formats are integrated, then adaptability is improved, but device complexity increases
Solution Approach 1:
The system employs a universal multi-domain architecture with standardized interfaces (sub-networks, multi-tier network) that can accommodate multiple sensor types and data formats. Each domain can be configured to handle specific sensor inputs while maintaining compatibility through the standardized network interface.
Solution Approach 2:
Different memory domains are assigned different memory formats optimized for their specific purposes (first memory format for first sensor inputs, second memory format for second sensor inputs). This local optimization allows each memory domain to be tailored to its specific function while the overall system maintains versatility through the multi-domain structure.
3Productivity
If high-speed processing is implemented to meet computational demands, then productivity is improved, but energy consumption increases
Solution Approach 1:
The system implements a hierarchical memory structure with different access speeds and energy characteristics. Frequently accessed data is stored in faster, higher-power first memory, while less frequently accessed data resides in slower, lower-power second memory. This local optimization allows high-speed processing when needed while conserving energy during normal operation.
Solution Approach 2:
The processing system is divided into multiple domains with specialized processors that can operate independently and in parallel. This segmentation allows the system to activate only the necessary processing domains for current tasks, improving productivity for specific functions while reducing overall energy consumption by keeping inactive domains dormant.
Data Source
AI summary
A system on a chip, including a first domain having a first processor, a first local memory coupled to the first processor, wherein the first local memory having a first memory format and a first sub-network coupled to the first processor, a second domain having a second processor, a second local memory coupled to the second processor and a second sub-network coupled to the second processor, wherein the second local memory having a second memory format which differs from the first memory format, a multi-tier network coupled to the first sub-network and the second sub-network, a global memory coupled to the multi-tier network and a multi-port DDR controller coupled to the global memory to receive, transmit and share the first local memory having the first memory format and the second local memory having the second memory format based on a predetermined criteria.