Multi-Engine Address Translation for Nested Virtualization

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Solution Overview

Problem

In computing environments with multiple levels of virtualization, the complexity of address translation processes using a single state machine or engine leads to inefficiencies and performance issues due to the need for dynamic address translation across multiple virtualization levels.

Innovation Solution

The implementation of multiple basic translation engines, each capable of performing address translation within a single virtualization level, where a first engine performs guest-level translation and a second engine performs host-level translation, allowing for efficient address translation across multiple virtualization levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single state machine or engine is used for address translation across multiple virtualization levels, then the system can maintain a unified translation process, but the complexity of the address translation process increases and performance deteriorates

Engineering Contradiction:
Improveaddress translation process complexityVSAvoidaddress translation performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent divides the address translation facility into multiple independent translation engines, where each engine handles a single virtualization level. This segmentation allows parallel processing of guest-level and host-level translations, reducing the complexity of the overall translation process while improving performance through concurrent operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a multi-dimensional translation architecture where translations occur across multiple virtualization levels simultaneously. By adding the dimension of parallel translation engines operating at different virtualization levels, the system achieves better performance without proportionally increasing complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If multiple translation engines are used for address translation at different virtualization levels, then translation performance improves, but the device complexity increases

Engineering Contradiction:
Improveaddress translation performanceVSAvoidtranslation engine architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent employs identical translation engines for both guest-level and host-level translations. This homogeneity simplifies the overall architecture by using standardized, interchangeable components rather than specialized engines for each level, thereby improving performance through parallelism without proportionally increasing complexity.

Inventive Principle:
Principle #33Homogeneity

Solution Approach 2:

Each translation engine is designed to be universal and capable of performing address translation at any virtualization level. This multi-functionality reduces the need for level-specific engine designs, simplifying the architecture while enabling flexible, high-performance parallel translation operations.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If dynamic address translation is performed by walking multiple levels of address translation tables, then accurate address mapping is achieved, but the translation time increases

Engineering Contradiction:
Improveaddress mapping accuracyVSAvoidtranslation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs host-level translation in advance of guest-level translation by using the host translation engine to pre-translate host virtual addresses to host non-virtual addresses. These pre-translated addresses are then used by the guest translation engine, eliminating the need for sequential walking of multiple translation table levels and reducing overall translation time while maintaining accuracy.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10956341B2Multi-engine address translation facility
Publication Date: 2021.03.23 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10956341B2 patent drawing
  • US10956341B2 patent drawing
  • US10956341B2 patent drawing

AI summary

An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels. In operation, based on the first translation engine performing a guest level translation, the second translation engine may perform a host level translation of a resulting guest non-virtual address to a host non-virtual address based on the guest level translation by the first translation engine.