Multi-FEC Data Interleaving for Burst Error Correction

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Solution Overview

Problem

Current data transmission methods in high-speed networks face challenges with bit error correction due to increased signal loss and intersymbol interference, particularly in Ethernet interfaces, where the traditional interleaving method introduces delays and reduces the effectiveness of FEC units.

Innovation Solution

Implementing a data sending and receiving method that uses multiple FEC units with interleaving and de-interleaving to distribute bit errors across different FEC units, eliminating the need for row-writing and column-reading interleaving, thereby reducing delays and enhancing error correction capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional row-writing and column-reading interleaving is used, then bit errors are distributed across different code words, but transmission delay increases significantly

Engineering Contradiction:
Improveerror correction capabilityVSAvoidtransmission delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent inverts the traditional interleaving approach by using column-writing and row-reading instead of row-writing and column-reading. This inversion achieves error distribution across code words while avoiding the need to store entire rows before reading, thereby reducing transmission delay while maintaining error correction capability

Inventive Principle:
Principle #13The other way round (Inversion)

Solution Approach 2:

The patent segments the data stream into multiple parallel processing paths, where each path handles a portion of the data with its own FEC unit. This segmentation allows simultaneous processing of multiple data units, reducing overall delay while distributing errors across different FEC units for improved error correction

Inventive Principle:
Principle #1Segmentation

2Reliability

If all data units are processed by a single FEC unit, then system complexity is reduced, but error correction effectiveness decreases when burst errors occur

Engineering Contradiction:
Improveerror correction effectivenessVSAvoidFEC unit configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the data stream into multiple parallel paths, each processed by a separate FEC unit. This segmentation distributes burst errors across multiple FEC units, improving error correction effectiveness while maintaining manageable complexity through modular architecture

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of parallelism by processing data through multiple FEC units simultaneously rather than sequentially through a single unit. This multi-dimensional processing approach enhances error correction capability without proportionally increasing overall system complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Speed

If high-speed transmission is implemented, then data rate increases, but signal quality deteriorates due to high frequency loss and intersymbol interference

Engineering Contradiction:
Improvedata transmission rateVSAvoidsignal quality
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies FEC encoding preliminarily to data units before transmission, creating redundant information that enables error correction at the receiver. This preliminary error protection action allows high-speed transmission to proceed while maintaining signal quality through proactive error mitigation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms where the receiver detects errors in transmitted data units and uses the redundant information from FEC encoding to correct these errors. This feedback loop maintains signal quality reliability even at high transmission rates where errors are more likely to occur

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP4203359B1Data receiving method and device, and data sending method and device
Publication Date: 2024.09.18 HUAWEI TECH CO LTD
  • EP4203359B1 patent drawingFigure 1
  • EP4203359B1 patent drawingFigure 2
  • EP4203359B1 patent drawingFigure 3

AI summary

An embodiment of the present invention discloses a data sending and receiving method. A first FEC unit of a sending device sends, by using a first channel, a first data stream on which first FEC encoding has been performed, where the first data stream includes a channel identifier of the first channel; a second FEC unit of the sending device sends, by using a second channel, a second data stream on which second FEC encoding has been performed, where the second data stream includes a channel identifier of the second channel; and the sending device performs interleaving on the first data stream and the second data stream, to obtain an output data stream, and sends the output data stream to a receiving device. The receiving device may perform de-interleaving on the data stream after the interleaving, and send at least data streams obtained through the de-interleaving to different FEC units for decoding, which improves an error correction capability of the receiving device. In addition, in the present invention, an operation of writing by row and reading by column does not need to be performed. Therefore, no delay is generated.