Multi-FPGA Configuration Update Using a Shared Update FPGA
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Solution Overview
Problem
Existing information processing apparatuses face challenges in reducing CPU load through FPGA configuration, as current methods require each FPGA to have an update processing unit and dedicated memory, increasing circuit scale and memory usage.
Innovation Solution
A configuration where a single FPGA includes an update processing unit to update configuration data for multiple FPGAs, with corresponding memories, and selectors to manage communication paths, reducing circuit scale and memory usage by centralizing update processing and data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If each FPGA has its own update processing unit and dedicated memory, then each FPGA can independently update its configuration data, but the circuit scale and memory usage increase significantly
Solution Approach 1:
One FPGA is designed with universal update processing capability that can serve all FPGAs in the system. This single FPGA contains the update processing unit and can update configuration data for any other FPGA, eliminating the need for each FPGA to have its own dedicated update processing unit. The universality principle reduces device complexity while maintaining the ability to update all FPGAs independently.
Solution Approach 2:
The update processing functions of multiple FPGAs are merged into a single FPGA. Instead of having separate update processing units in each FPGA, the patent combines these functions into one shared resource. This merging approach significantly reduces the overall circuit scale while preserving the functional capability to update all FPGAs.
2Reliability
If each FPGA has dedicated memory for configuration data, then each FPGA can store and access its own configuration data, but memory usage increases
Solution Approach 1:
One memory unit is designed with universal storage capability that can store configuration data for all FPGAs. This single memory can be accessed by any FPGA to retrieve its configuration data, eliminating the need for each FPGA to have its own dedicated memory. The universality principle reduces total memory usage while maintaining reliable configuration storage.
Solution Approach 2:
The dedicated memory resources of multiple FPGAs are merged into a single shared memory unit. Instead of having separate memory modules for each FPGA, the patent combines these into one memory that stores all configuration data. This merging approach significantly reduces the total quantity of memory required in the system.
3Device complexity
If a single FPGA updates all configuration data, then circuit scale and memory usage are reduced, but the update processing burden on that FPGA increases
Solution Approach 1:
The CPU acts as an intermediary in the configuration update process. When configuration data needs to be updated, the CPU receives the new configuration data from external sources and transfers it to the appropriate FPGA or memory. This mediator approach distributes the processing burden, preventing any single FPGA from being overloaded with all update operations.
Solution Approach 2:
The update processing FPGA updates its own configuration data directly when needed, without requiring intervention from other FPGAs or complex coordination. This self-service capability allows the FPGA to efficiently manage its own configuration while maintaining the ability to update other FPGAs, improving overall update processing efficiency.
Data Source
AI summary
An information processing apparatus includes a central processing unit (CPU), a plurality of field-programmable gate arrays (FPGAs) connected to the CPU to communicate with the CPU, and a plurality of memories provided in a one-to-one relationship with the plurality of FPGAs. Each of the plurality of memories is configured to store configuration data of a corresponding one of the plurality of FPGAs. One of the plurality of FPGAs is configured to update the configuration data of each of the plurality of FPGAs stored in a corresponding one of the plurality of memories.