Multi Gate Dielectric Nitrogen Plasma Processing
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Solution Overview
Problem
Current methods for manufacturing multi gate oxide thicknesses in semiconductor devices result in non-uniform nitrogen profiles in gate dielectrics, leading to increased leakage current, particularly in high voltage devices with thicker gate dielectrics, reducing reliability.
Innovation Solution
A method involving the formation of multiple gate dielectric thickness layers by subjecting exposed portions of a first layer of gate dielectric material to a nitrogen containing plasma, incorporating oxygen, and selectively removing masking layers to achieve varying thicknesses, thereby enhancing nitrogen distribution and reducing leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If non-thermal nitridation (plasma nitridation) is performed on gate dielectrics to reduce leakage current, then leakage current is suppressed, but nitrogen distribution becomes non-uniform resulting in reduced reliability
Solution Approach 1:
The patent divides the gate dielectric structure into multiple layers with different nitrogen concentrations. A first gate dielectric layer is formed with a first nitrogen concentration, and a second gate dielectric layer is formed with a second nitrogen concentration that is higher than the first. This segmentation allows each layer to be optimized independently - the first layer provides baseline leakage suppression while the second layer enhances reliability through uniform high nitrogen distribution, thus resolving the contradiction between leakage current suppression and device reliability.
2Productivity
If gate dielectric thickness is reduced to meet device requirements, then device performance is improved, but leakage current increases particularly in high voltage devices
Solution Approach 1:
The patent applies local quality by creating different nitrogen concentration profiles in different regions of the gate dielectric structure. The first gate dielectric layer has a first nitrogen concentration optimized for overall device performance, while the second gate dielectric layer has a second nitrogen concentration specifically optimized to suppress leakage current in high voltage devices. This localized optimization allows thin gate dielectrics to maintain high performance while differentiating nitrogen content to address leakage issues in specific device regions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in improved reliability by reducing leakage current and achieving compatible gate dielectric thicknesses for both low and high voltage operations within a single integrated circuit, maintaining compatibility with existing processes and avoiding additional patterning steps.
Implementation Method 1
subjecting exposed portions of the first layer of gate dielectric material to a nitrogen containing plasma, thereby forming a second layer of gate dielectric material
Implementation Method 2
introducing nitrogen atoms into the gate dielectrics to suppress leakage currents
Implementation Method 3
incorporating oxygen into the second layer of gate dielectric material located in the first active region
Data Source
AI summary
The present invention provides a method for manufacturing a semiconductor device having multiple gate dielectric thickness layers. The method, in one embodiment, includes forming a first layer of gate dielectric material over a semiconductor substrate in a first active region and a second active region of a semiconductor device, and patterning a masking layer to expose the first layer of gate dielectric material located in the first active region. The method further includes subjecting exposed portions of the first layer of gate dielectric material to a nitrogen containing plasma, thereby forming a second layer of gate dielectric material over the first layer of gate dielectric material located in the first active region, incorporating oxygen into the second layer of gate dielectric material located in the first active region, and removing the, patterned masking layer, thereby resulting in a first greater thickness gate dielectric in the first active region and a second lesser thickness gate dielectric in the second active region.


