Multi-Gate Device Diffusion Stop Layer to Reduce Leakage

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Solution Overview

Problem

Conventional multi-gate transistor structures, such as FinFETs and MBC transistors, face challenges in reducing leakage, capacitance, and resistance, which are not adequately addressed by existing designs.

Innovation Solution

The introduction of a diffusion stop layer with a higher germanium content than the outer epitaxial layer, formed through conformal deposition and selective etching, to control dopant diffusion and reduce parasitic capacitance, combined with epitaxial layers to enhance carrier mobility and prevent dopant out-diffusion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multi-gate transistor structures are used to improve gate control, then gate-channel coupling is increased, but parasitic capacitance increases

Engineering Contradiction:
Improvegate controlVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The source/drain structure is segmented into multiple epitaxial layers with different germanium contents. The outer epitaxial layer has lower germanium content while the inner epitaxial layer has higher germanium content, creating distinct functional zones that reduce parasitic capacitance while maintaining gate control

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the source/drain structure are assigned different material compositions. The outer region uses lower germanium content material to reduce capacitance, while the inner region uses higher germanium content material to maintain electrical performance and carrier mobility

Inventive Principle:
Principle #3Local quality

2Reliability

If conventional multi-gate transistor structures are used, then device performance is improved, but leakage current is not sufficiently reduced

Engineering Contradiction:
Improvedevice performanceVSAvoidleakage current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The germanium content parameter is varied across different epitaxial layers to optimize device performance. By controlling the germanium concentration gradient between outer and inner layers, the patent achieves better carrier mobility while reducing leakage current through improved band structure

Inventive Principle:
Principle #35Parameter changes

3Productivity

If source/drain structures are scaled down, then production efficiency is increased, but dopant diffusion control becomes more difficult

Engineering Contradiction:
Improveproduction efficiencyVSAvoiddopant diffusion control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The outer epitaxial layer acts as an intermediary barrier between the doping region and the channel. This intermediate layer with controlled germanium content regulates dopant diffusion, preventing excessive dopant migration while enabling efficient production through standardized fabrication processes

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The diffusion stop layer effectively reduces leakage and parasitic capacitance while improving device performance by controlling dopant diffusion and enhancing carrier mobility, thus addressing the limitations of conventional multi-gate transistor structures.

Implementation Method 1

a diffusion stop layer with a higher germanium content than the outer epitaxial layer, formed through conformal deposition and selective etching, to control dopant diffusion

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

combined with epitaxial layers to enhance carrier mobility and prevent dopant out-diffusion

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS12396192B2Leakage reduction for multi-gate devices
Publication Date: 2025.08.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12396192B2 patent drawing
  • US12396192B2 patent drawing
  • US12396192B2 patent drawing

AI summary

Methods and semiconductor structures are provided. A method according to the present disclosure includes depositing a top epitaxial layer over a substrate, forming a fin structure from the top epitaxial layer and a portion of the substrate, recessing a source/drain region of the fin structure to form a source/drain recess, conformally depositing a semiconductor layer over surfaces of the source/drain recess, etching back the semiconductor layer to form a diffusion stop layer over a bottom surface of the source/drain recess, depositing a first epitaxial layer over the diffusion stop layer and sidewalls source/drain recess, depositing a second epitaxial layer over the first epitaxial layer, and depositing a third epitaxial layer over the second epitaxial layer. A germanium concentration of the diffusion stop layer is greater than a germanium concentration of the top epitaxial layer or a germanium concentration of the first epitaxial layer.