Multi-Gate Insulating Film Formation for Semiconductor Devices
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Solution Overview
Problem
Conventional MOS semiconductor device manufacturing methods result in abnormal transistor characteristics in low leakage MOSFETs due to impurity segregation into gate oxide films, leading to increased boron concentration variations and junction leakage.
Innovation Solution
A method involving the formation of protective insulating films on active regions to suppress thermal oxidation, allowing for the reduction of impurity segregation by forming gate insulating films in a specific sequence, thereby adjusting ion implantation doses and preventing abnormal transistor characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If thermal oxidation is performed three times to form three kinds of gate insulating films with different thicknesses, then the gate insulating films with different thicknesses are formed on a single chip, but impurity segregation into gate oxide films occurs causing abnormal transistor characteristics
Solution Approach 1:
A protective oxide film is formed on the low leakage MOSFET active region before the first gate oxidation step. This preliminary protective layer prevents impurity segregation during subsequent thermal oxidation processes while allowing the formation of gate insulating films with different thicknesses on different active regions.
Solution Approach 2:
The protective oxide film acts as an intermediary layer between the silicon substrate and the gate oxide film formation process. It mediates the thermal oxidation process by controlling impurity diffusion and segregation, thereby preventing abnormal transistor characteristics while enabling differential gate oxide thickness formation.
2Measurement precision
If ion implantation dose is increased to compensate for impurity segregation, then the threshold voltage can be maintained, but junction leakage increases
Solution Approach 1:
The protective oxide film converts the harmful effect of impurity segregation into a beneficial control mechanism. By deliberately introducing this protective layer, impurity diffusion is controlled in a predictable manner, allowing threshold voltage maintenance without the need to increase ion implantation dose, thereby avoiding junction leakage.
3Object-generated harmful factors
If the gate insulating film thickness is increased for low leakage MOSFET, then leakage current is reduced, but the transistor speed decreases
Solution Approach 1:
Different gate insulating film thicknesses are applied to different active regions based on their specific functional requirements. The low leakage MOSFET receives a thicker gate oxide for reduced leakage, while the high speed MOSFET receives a thinner gate oxide for faster switching, achieving local optimization of device characteristics.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces impurity segregation and ion implantation doses, preventing abnormal transistor characteristics such as leakage at the pn junction, while maintaining the characteristics of high speed and input/output MOSFETs when integrated into a multi-function chip.
Implementation Method 1
thermal oxidation is performed three times has been proposed
Implementation Method 2
impurity segregation into gate oxide films
Implementation Method 3
ion implantation for channel formation
Data Source
AI summary
After protective insulating films are formed on first to third active regions, the protective insulating films formed on the first and third active regions are removed. Subsequently, an insulating film to be a first gate insulating film is formed on each of the first and third active regions, and then, the protective insulating film formed on the second active region is removed. Next, an insulating film to be a second gate insulating film is formed on the second active region, and then, the insulating film to be the first gate insulating film formed on the third active region is removed. Finally, an insulating film to be a third gate insulating film is formed on the third active region.