Multi-Gate RF Switch Layout for Lower Parasitic Coupling
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Solution Overview
Problem
Conventional multi-gate RF switches suffer from undesirable properties such as direct input to output metal parasitics, long metal fingers handling large currents, additional coupling from internal drain-to-source routing, and lack of body bias, which degrade their figure of merit (FOM) especially at high frequencies like 5G FR2 and millimeter wave frequencies.
Innovation Solution
The RF switch layout incorporates a dual-gate design with only two FETs in series, using polysilicon gate routing, body biasing, and air gap trenches to reduce metal coupling and parasitic capacitance, while maintaining shorter drain/source fingers and avoiding direct input/output coupling, thus improving the on-state resistance and off-state capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional multi-gate RF switch design is used, then switching functionality is provided, but metal parasitics and coupling increase degrading FOM at high frequencies
Solution Approach 1:
The patent divides the RF switch into multiple separate gate structures (first gate structure and second gate structure) that are spatially separated and independently controlled. This segmentation reduces the direct metal parasitic coupling between input and output paths while maintaining switching functionality through coordinated gate control.
Solution Approach 2:
The patent introduces air gap trenches as intermediary structures between metal routing paths and active regions. These air gaps act as dielectric mediators that reduce parasitic capacitance and coupling effects, improving FOM at high frequencies by isolating electric fields.
2Power
If long metal fingers are used to handle large currents, then current handling capability is improved, but resistance and parasitic effects increase
Solution Approach 1:
The patent transitions from planar metal finger configurations to three-dimensional vertically-stacked gate structures. This dimensional change allows current to flow through multiple parallel conduction paths between source and drain regions, increasing current handling capability while reducing the lateral metal routing length that causes parasitic losses.
Solution Approach 2:
The patent merges multiple gate structures (first and second gate structures) into a unified RF switch device with shared source and drain regions. This combining creates parallel current conduction paths through the active region, improving power handling while the compact vertical layout reduces overall metal routing length and associated parasitics.
3Device complexity
If direct input to output metal routing is used, then routing simplicity is maintained, but direct coupling and parasitics degrade performance
Solution Approach 1:
The patent segments the metal routing into separate first and second metal routing paths that are spatially separated and controlled by different gate structures. This segmentation prevents direct metal-to-metal coupling between input and output while maintaining routing simplicity through systematic layout design.
Solution Approach 2:
The patent uses air gap trenches and separate gate structures as intermediary elements between input and output metal routing. These intermediaries block direct electric field coupling and parasitic capacitance formation while allowing signal transmission through the controlled switching action of the transistor gates.
Data Source
AI summary
Apparatus and methods for multi-gate radio frequency (RF) switches are disclosed herein. The RF switches use various layout design techniques to improve figure of merit (FOM). Examples of such techniques include using only two field-effect transistors (FETs) in series to maintain shorter fingers for lower metal resistance, placing a body contact on only one side of the RF switch layout, implementing metallization with reduced coupling from input to output, and/or providing air gaps to improve high frequency performance.