Multi-Gate Transistor Structure for Higher Drive Current
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Solution Overview
Problem
The drive current of traditional transistors is relatively small due to a limited contact area between the gate and the channel, which affects their performance.
Innovation Solution
A transistor design featuring multiple gates with a same extension direction, where each gate has a first end inside and a second end outside an accommodation space within the channel, increasing the contact area and potential superposition, thereby enhancing the drive current and control capability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a traditional single gate structure is used, then the device complexity is low, but the drive current is small due to limited contact area between gate and channel
Solution Approach 1:
The gate is divided into multiple segments (first gate, second gate, third gate, fourth gate) arranged around the channel in different directions. Each gate segment contacts the channel at different locations, increasing the total contact area between gate and channel. This segmentation allows the transistor to achieve higher drive current while maintaining a manageable structural complexity through systematic arrangement of the divided gate components.
2Ease of operation
If multiple gates are introduced to increase contact area, then the drive current and control capability improve, but the device complexity increases
Solution Approach 1:
The four gates are asymmetrically positioned around the channel, with each gate extending in different directions (first and second gates in first direction, third and fourth gates in second direction). This asymmetric arrangement optimizes the control capability over the channel by providing electric field coverage from multiple angles, thereby improving control effectiveness while avoiding the need for完全 symmetric complex configurations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The increased contact area and potential superposition between the gates and the channel improve the drive current and control capability of the transistor, leading to enhanced performance.
Implementation Method 1
a dielectric layer, located between the gate and the channel, insulating and isolating the gate and the channel
Implementation Method 2
The MOS transistor uses an electric field formed by the gate to control an amount of induced charge in the channel, to further change a state of the channel
Data Source
AI summary
The present disclosure provides a transistor and a manufacturing method thereof, and a memory, and relates to the technical field of semiconductors. The transistor includes: a channel, wherein a plurality of accommodation spaces are formed therein; a plurality of gates, wherein the plurality of gates have a same extension direction and each have a first end and a second end that are opposite, the first end of the gate is located inside one of the accommodation spaces, and the second end of the gate is located outside the corresponding accommodation space; a dielectric layer, located between the gate and the channel, insulating and isolating the gate and the channel; a source, provided at one end of the channel; and a drain, provided at the other end of the channel, wherein the drain and the source are spaced apart.