Multi-GPU Frame Rendering via Alternate Frame Rendering
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Solution Overview
Problem
Existing methods for rendering images across multiple displays driven by multiple graphics processors are limited, requiring complex software logic to manage individual GPUs and display topologies, leading to inefficient processing performance and high data traffic.
Innovation Solution
The implementation of Alternate Frame Rendering (AFR) using two image processing circuits that mirror a single large surface, where each circuit alternately renders even and odd frames and performs peer-to-peer copies of frame portions to ensure seamless display across multiple monitors without needing specific knowledge of GPU and display topology.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If each GPU renders to its own separate memory buffer, then each GPU can independently process display data, but the software complexity increases and processing performance is limited
Solution Approach 1:
The patent divides the rendering workload by GPU, with each GPU rendering to its own separate memory buffer. This segmentation allows parallel processing across multiple GPUs while maintaining independent memory spaces, resolving the contradiction by enabling performance scaling without requiring complex shared memory management software
Solution Approach 2:
The patent creates a unified virtual address space that can be accessed by all GPUs through a common interface. This universal access mechanism allows each GPU to independently render to its buffer while the system presents a unified display surface, eliminating the need for complex topology-aware software while maintaining multi-GPU performance
2Device complexity
If a single GPU drives multiple displays using a single large surface, then software rendering is simplified, but the number of supported displays is limited and processing performance is constrained
Solution Approach 1:
The patent segments the display driving function across multiple GPUs, with each GPU responsible for its own memory buffer and display outputs. This allows the system to support more displays than a single GPU could handle while keeping each GPU's rendering logic simple and independent
Solution Approach 2:
The patent introduces a mediator layer that manages the mapping between the unified virtual address space and the physical memory buffers of multiple GPUs. This intermediary handles the complexity of multi-display support while presenting a simplified interface to applications, resolving the contradiction between simplicity and versatility
3Reliability
If multiple GPUs render every frame collectively, then all displays are updated, but data traffic across the interconnect bus increases and processing overhead is high
Solution Approach 1:
The patent implements alternate frame rendering where GPUs take turns rendering different frames. This periodic action reduces interconnect bus traffic and processing overhead while maintaining display synchronization through the unified virtual address space mapping
Solution Approach 2:
The patent uses memory copy operations to transfer rendered frame data between GPU memory buffers and the display memory. This copying mechanism allows efficient data movement with minimal processing overhead while ensuring all displays receive updated content
Data Source
AI summary
An apparatus includes a plurality of image processing circuits. Each image processing circuit generates an image frame corresponding to a single large surface. The first image processing circuit provides a portion of the generated image frame for a first display or plurality of displays and provides a remaining portion of the image frame to the remaining image processing circuits. The next image processing circuits provides the remaining portion of the image frame for the next plurality of displays.