Multi-GPU Frame Rendering via Inter-GPU Data Link

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Solution Overview

Problem

Current graphics rendering techniques such as alternate frame rendering (AFR) and split-frame rendering (SFR) fail to effectively reduce latency and impose computational and run-time restrictions, limiting their applicability in modern graphics applications.

Innovation Solution

A method utilizing multiple graphics processing units (GPUs) to render graphics frames by generating memory access requests across a high-speed data link, accumulating access request counts, and notifying a driver when a threshold is reached to optimize data transfer and distribution of rendering work, thereby reducing latency and improving scalability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If alternate frame rendering (AFR) is used to improve frame rate, then frame rate is improved, but latency is not reduced and performance degradation occurs in applications with inter-frame data dependencies

Engineering Contradiction:
Improveframe rateVSAvoidlatency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent divides the rendering workload into spatial segments ( Checkerboard pattern) rather than temporal segments (alternate frames). Each GPU renders specific spatial regions (e.g., even or odd checkerboard squares) of the same frame simultaneously, eliminating inter-frame dependencies while maintaining low latency for each frame.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from temporal distribution (AFR renders different frames at different times) to spatial distribution (SFR renders different regions of the same frame simultaneously). This dimensional shift allows both GPUs to work on the same frame timeline, reducing latency while improving throughput through parallel spatial processing.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If split-frame rendering (SFR) is used to improve frame rate, then frame rate is improved for certain applications, but it becomes impractical with modern workloads due to computational and run-time restrictions

Engineering Contradiction:
Improveframe rateVSAvoidcomputational and run-time restrictions
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent creates a universal multi-GPU rendering framework that handles both spatial and temporal distribution modes. The system can dynamically switch between rendering different spatial regions (Checkerboard SFR) or different temporal frames (AFR) or combinations thereof, making it adaptable to various workload types without imposing fixed computational restrictions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent implements dynamic workload distribution where GPUs can flexibly assign rendering tasks based on current frame requirements, data dependencies, and performance needs. Rather than fixed spatial partitions, the system dynamically determines which GPU renders which regions or frames, adapting to changing computational requirements without rigid constraints.

Inventive Principle:
Principle #15Dynamics

3Speed

If data is stored in local memory circuit for fast access, then access speed is improved, but memory capacity is limited and data sharing between GPUs becomes inefficient

Engineering Contradiction:
Improvedata access speedVSAvoidmemory capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent introduces a high-speed inter-GPU data link as an intermediary between the two GPUs' local memory circuits. This intermediary enables fast data sharing and communication between GPUs without requiring data to be copied to slower system memory, effectively extending accessible memory capacity while maintaining high access speeds through direct peer-to-peer transfers.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Productivity

If multiple GPUs are used to render frames, then processing capacity is improved, but coordination overhead and data transfer complexity increase

Engineering Contradiction:
Improveprocessing capacityVSAvoidcoordination overhead and data transfer complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements self-service mechanisms where each GPU autonomously tracks its own access request counts to remote memory pages and independently generates notifications when thresholds are reached. This eliminates the need for complex centralized coordination overhead, as each GPU manages its own data transfer needs through hardware-based counting and automatic driver notification.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10402937B2Multi-GPU frame rendering
Publication Date: 2019.09.03 NVIDIA CORP
  • US10402937B2 patent drawing
  • US10402937B2 patent drawing
  • US10402937B2 patent drawing

AI summary

A method for rendering graphics frames allocates rendering work to multiple graphics processing units (GPUs) that are configured to allow access to pages of data stored in locally attached memory of a peer GPU. The method includes the steps of generating, by a first GPU coupled to a first memory circuit, one or more first memory access requests to render a first primitive for a first frame, where at least one of the first memory access requests targets a first page of data that physically resides within a second memory circuit coupled to a second GPU. The first GPU requests the first page of data through a first data link coupling the first GPU to the second GPU and a register circuit within the first GPU accumulates an access request count for the first page of data. The first GPU notifies a driver that the access request count has reached a specified threshold.