Multi-Granular Routing Architecture for IC Timing Convergence
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional routers for semiconductor integrated circuits face inefficiencies due to a rigid separation between global and detail routers and limited granularity, leading to ineffective interaction and suboptimal routing processes.
Innovation Solution
The implementation of a routing architecture with multiple granular levels of abstraction, allowing for incremental changes and non-uniform resource allocation, enabling routing at various levels of detail and abstraction, including guide, global segment, global via, detail segment, detail via, imaged geometry, and electrical characteristics representations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a rigid two-stage global route/detail route approach is used, then the routing process is structured and manageable, but interaction between global and detail routers is ineffective and efficiency is reduced
Solution Approach 1:
The routing process is segmented into multiple independent routing levels (global routing, semi-detailed routing, detailed routing) that can operate independently and interact effectively. Each level handles specific routing tasks at appropriate granularity, allowing parallel processing and reducing bottlenecks between stages.
Solution Approach 2:
The routing architecture transitions from a rigid two-stage structure to a dynamic multi-level system where routing activities can be flexibly allocated across different levels. The system can adaptively assign routing tasks to different levels based on design requirements, enabling efficient interaction and resource utilization.
2Device complexity
If only two levels of granularity (global routes and detail routes) are available, then the routing process is simple, but routing activities cannot be performed at intermediate levels of detail
Solution Approach 1:
The routing granularity is segmented into multiple intermediate levels between global and detail routing. These intermediate levels (such as semi-detailed routing) enable routing activities at appropriate levels of abstraction, allowing designers to perform specific routing tasks without committing to full detailed routing prematurely.
Solution Approach 2:
The routing system adds a new dimension of granularity control by introducing multiple intermediate routing levels. This creates a spectrum of routing detail levels that can be selected based on specific design needs, transforming the limited two-level approach into a flexible multi-dimensional routing hierarchy.
3Device complexity
If uniform routing resources are allocated to all portions of the design, then resource allocation is simple, but critical timing portions cannot be prioritized for faster analysis
Solution Approach 1:
Different portions of the circuit design receive different levels of routing detail and resource allocation based on their specific requirements. Critical timing portions are assigned to lower abstraction levels with more detailed routing and greater computational resources, while non-critical portions use higher abstraction levels with fewer resources, optimizing overall timing analysis efficiency.
Data Source
AI summary
Disclosed is an improved method, system, and article of manufacture for implementing routing for an electrical circuit and chip design. A routing architecture can be represented as a spectrum of different granular routing levels. Instead of routing based upon area, routing can be performed for specific routes or portions of routes. Different types of representation or levels of abstraction for the routing can be used for the same net or route. Partial topological reconfiguration, refinement, or rip-up can be performed for a portion of the integrated circuit design, where the portion is smaller than an entire route or net. Non-uniform levels of routing activities or resources may be applied to route the design. Prioritization may be used to route certain portions of the design with greater levels of detail, abstraction, or resources than other portions of the design.