Multi-Height Standard Cell Interconnects for Stable Common Signal Supply
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Solution Overview
Problem
In semiconductor integrated circuits with multi-height cells, the increased resistance value of supply paths for common signals leads to signal delay and voltage drop, making high-speed and stable circuit operation challenging.
Innovation Solution
A semiconductor integrated circuit device with a multi-height cell configuration, featuring multiple power supply lines and height regions, where metal interconnects connect flip-flop circuits across these regions, reducing the resistance value of supply paths for common signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a multi-height cell structure is used to increase circuit speed and reduce area, then the cell height increases and more partial circuits can be integrated, but the supply path length for common signals increases causing higher resistance value
Solution Approach 1:
The supply path for common signals is segmented into multiple shorter paths by introducing intermediate connection points and distributed power supply networks within the multi-height cell. Instead of a single long supply path from the cell boundary to all partial circuits, the power supply network is divided into multiple segments that connect to different height regions, reducing the maximum path length and resistance value for any individual partial circuit.
Solution Approach 2:
The patent utilizes the vertical dimension (height direction) to create multiple supply path routes. By arranging power supply lines and connection structures across different height levels (first height region, second height region, etc.), the signal can be supplied through multiple dimensional pathways rather than being constrained to a single planar path, effectively reducing the resistance value through alternative routing.
2Device complexity
If the supply path length increases in a multi-height cell, then the resistance value increases, but this causes signal delay and voltage drop that destabilize circuit operation
Solution Approach 1:
The patent applies local quality by providing optimized supply path characteristics to different regions of the multi-height cell. Each height region and partial circuit receives a customized supply path configuration tailored to its specific location and requirements, ensuring that local resistance values are minimized for critical circuits while maintaining overall system performance and stability.
3Adaptability or versatility
If multiple partial circuits share a common supply path, then the path resistance increases, but this leads to increased voltage drop and signal delay
Solution Approach 1:
The common signal supply path is segmented into multiple independent or semi-independent paths that serve different groups of partial circuits. This segmentation reduces the number of circuits sharing each individual path, thereby reducing the cumulative resistance and voltage drop while still maintaining efficient common signal distribution across the entire multi-height cell.
Solution Approach 2:
Intermediary connection structures and distribution networks are introduced between the main power supply sources and the individual partial circuits. These intermediary elements act as local distribution hubs that reduce the path length and resistance for signals reaching multiple partial circuits, effectively mediating between the common supply source and individual circuit requirements.
Data Source
AI summary
A semiconductor integrated circuit device includes a standard cell having a plurality of height regions. A plurality of partial circuits having an identical function and each operating in response to common signals S and NS are arranged in any one of the height regions. A metal interconnect forming part of a supply path for the common signal S is arranged in the height region so as to be connected to the partial circuits, and a metal interconnect forming part of a supply path for the common signal S is arranged in the height region so as to be connected to the partial circuits.